startup_py32f002axx.s 8.1 KB

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  1. ;******************************************************************************
  2. ;* @file : startup_py32f002axx.s
  3. ;* @brief : PY32F002Axx devices vector table for EWARM toolchain.
  4. ;* This module performs:
  5. ;* - Set the initial SP
  6. ;* - Set the initial PC == __iar_program_start
  7. ;* - Set the vector table entries with the exceptions ISR address
  8. ;* - Branches to __main in the C library (which eventually
  9. ;* calls main()).
  10. ;* After Reset the CortexM0+ processor is in Thread mode,
  11. ;* priority is Privileged, and the Stack is set to Main.
  12. ;******************************************************************************
  13. ;* @attention
  14. ;*
  15. ;* <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  16. ;* All rights reserved.</center></h2>
  17. ;*
  18. ;* This software component is licensed by Puya under BSD 3-Clause license,
  19. ;* the "License"; You may not use this file except in compliance with the
  20. ;* License. You may obtain a copy of the License at:
  21. ;* opensource.org/licenses/BSD-3-Clause
  22. ;*
  23. ;******************************************************************************
  24. ;* @attention
  25. ;*
  26. ;* <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  27. ;* All rights reserved.</center></h2>
  28. ;*
  29. ;* This software component is licensed by ST under BSD 3-Clause license,
  30. ;* the "License"; You may not use this file except in compliance with the
  31. ;* License. You may obtain a copy of the License at:
  32. ;* opensource.org/licenses/BSD-3-Clause
  33. ;*
  34. ;******************************************************************************
  35. ;
  36. ; The modules in this file are included in the libraries, and may be replaced
  37. ; by any user-defined modules that define the PUBLIC symbol _program_start or
  38. ; a user defined start symbol.
  39. ; To override the cstartup defined in the library, simply add your modified
  40. ; version to the workbench project.
  41. ;
  42. ; The vector table is normally located at address 0.
  43. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  44. ; The name "__vector_table" has special meaning for C-SPY:
  45. ; it is where the SP start value is found, and the NVIC vector
  46. ; table register (VTOR) is initialized to this address if != 0.
  47. ;
  48. ; Cortex-M version
  49. ;
  50. MODULE ?cstartup
  51. ;; Forward declaration of sections.
  52. SECTION CSTACK:DATA:NOROOT(3)
  53. SECTION .intvec:CODE:NOROOT(2)
  54. EXTERN __iar_program_start
  55. EXTERN SystemInit
  56. PUBLIC __vector_table
  57. DATA
  58. __vector_table
  59. DCD sfe(CSTACK) ; Top of Stack
  60. DCD Reset_Handler ; Reset Handler
  61. DCD NMI_Handler ; NMI Handler
  62. DCD HardFault_Handler ; Hard Fault Handler
  63. DCD 0 ; Reserved
  64. DCD 0 ; Reserved
  65. DCD 0 ; Reserved
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD 0 ; Reserved
  70. DCD SVC_Handler ; SVCall Handler
  71. DCD 0 ; Reserved
  72. DCD 0 ; Reserved
  73. DCD PendSV_Handler ; PendSV Handler
  74. DCD SysTick_Handler ; SysTick Handler
  75. ; External Interrupts
  76. DCD 0 ; 0Reserved
  77. DCD 0 ; 1Reserved
  78. DCD 0 ; 2Reserved
  79. DCD FLASH_IRQHandler ; 3FLASH
  80. DCD RCC_IRQHandler ; 4RCC
  81. DCD EXTI0_1_IRQHandler ; 5EXTI Line 0 and 1
  82. DCD EXTI2_3_IRQHandler ; 6EXTI Line 2 and 3
  83. DCD EXTI4_15_IRQHandler ; 7EXTI Line 4 to 15
  84. DCD 0 ; 8Reserved
  85. DCD 0 ; 9Reserved
  86. DCD 0 ; 10Reserved
  87. DCD 0 ; 11Reserved
  88. DCD ADC_COMP_IRQHandler ; 12ADC&COMP
  89. DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; 13TIM1 Break, Update, Trigger and Commutation
  90. DCD TIM1_CC_IRQHandler ; 14TIM1 Capture Compare
  91. DCD 0 ; 15Reserved
  92. DCD 0 ; 16Reserved
  93. DCD LPTIM1_IRQHandler ; 17LPTIM1
  94. DCD 0 ; 18Reserved
  95. DCD 0 ; 19Reserved
  96. DCD 0 ; 20Reserved
  97. DCD TIM16_IRQHandler ; 21TIM16
  98. DCD 0 ; 22Reserved
  99. DCD I2C1_IRQHandler ; 23I2C1
  100. DCD 0 ; 24Reserved
  101. DCD SPI1_IRQHandler ; 25SPI1
  102. DCD 0 ; 26Reserved
  103. DCD USART1_IRQHandler ; 27USART1
  104. DCD 0 ; 28Reserved
  105. DCD 0 ; 29Reserved
  106. DCD 0 ; 30Reserved
  107. DCD 0 ; 31Reserved
  108. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  109. ;;
  110. ;; Default interrupt handlers.
  111. ;;
  112. THUMB
  113. PUBWEAK Reset_Handler
  114. SECTION .text:CODE:REORDER:NOROOT(2)
  115. Reset_Handler
  116. LDR R0, =SystemInit
  117. BLX R0
  118. LDR R0, =__iar_program_start
  119. BX R0
  120. PUBWEAK NMI_Handler
  121. SECTION .text:CODE:REORDER:NOROOT(1)
  122. NMI_Handler
  123. B NMI_Handler
  124. PUBWEAK HardFault_Handler
  125. SECTION .text:CODE:REORDER:NOROOT(1)
  126. HardFault_Handler
  127. B HardFault_Handler
  128. PUBWEAK SVC_Handler
  129. SECTION .text:CODE:REORDER:NOROOT(1)
  130. SVC_Handler
  131. B SVC_Handler
  132. PUBWEAK PendSV_Handler
  133. SECTION .text:CODE:REORDER:NOROOT(1)
  134. PendSV_Handler
  135. B PendSV_Handler
  136. PUBWEAK SysTick_Handler
  137. SECTION .text:CODE:REORDER:NOROOT(1)
  138. SysTick_Handler
  139. B SysTick_Handler
  140. PUBWEAK FLASH_IRQHandler
  141. SECTION .text:CODE:REORDER:NOROOT(1)
  142. FLASH_IRQHandler
  143. B FLASH_IRQHandler
  144. PUBWEAK RCC_IRQHandler
  145. SECTION .text:CODE:REORDER:NOROOT(1)
  146. RCC_IRQHandler
  147. B RCC_IRQHandler
  148. PUBWEAK EXTI0_1_IRQHandler
  149. SECTION .text:CODE:REORDER:NOROOT(1)
  150. EXTI0_1_IRQHandler
  151. B EXTI0_1_IRQHandler
  152. PUBWEAK EXTI2_3_IRQHandler
  153. SECTION .text:CODE:REORDER:NOROOT(1)
  154. EXTI2_3_IRQHandler
  155. B EXTI2_3_IRQHandler
  156. PUBWEAK EXTI4_15_IRQHandler
  157. SECTION .text:CODE:REORDER:NOROOT(1)
  158. EXTI4_15_IRQHandler
  159. B EXTI4_15_IRQHandler
  160. PUBWEAK ADC_COMP_IRQHandler
  161. SECTION .text:CODE:REORDER:NOROOT(1)
  162. ADC_COMP_IRQHandler
  163. B ADC_COMP_IRQHandler
  164. PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
  165. SECTION .text:CODE:REORDER:NOROOT(1)
  166. TIM1_BRK_UP_TRG_COM_IRQHandler
  167. B TIM1_BRK_UP_TRG_COM_IRQHandler
  168. PUBWEAK TIM1_CC_IRQHandler
  169. SECTION .text:CODE:REORDER:NOROOT(1)
  170. TIM1_CC_IRQHandler
  171. B TIM1_CC_IRQHandler
  172. PUBWEAK LPTIM1_IRQHandler
  173. SECTION .text:CODE:REORDER:NOROOT(1)
  174. LPTIM1_IRQHandler
  175. B LPTIM1_IRQHandler
  176. PUBWEAK TIM16_IRQHandler
  177. SECTION .text:CODE:REORDER:NOROOT(1)
  178. TIM16_IRQHandler
  179. B TIM16_IRQHandler
  180. PUBWEAK I2C1_IRQHandler
  181. SECTION .text:CODE:REORDER:NOROOT(1)
  182. I2C1_IRQHandler
  183. B I2C1_IRQHandler
  184. PUBWEAK SPI1_IRQHandler
  185. SECTION .text:CODE:REORDER:NOROOT(1)
  186. SPI1_IRQHandler
  187. B SPI1_IRQHandler
  188. PUBWEAK USART1_IRQHandler
  189. SECTION .text:CODE:REORDER:NOROOT(1)
  190. USART1_IRQHandler
  191. B USART1_IRQHandler
  192. END
  193. /*****************************END OF FILE************************************/