py32f002b_hal_rcc_ex.h 12 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f002b_hal_rcc_ex.h
  4. * @author MCU Application Team
  5. * @brief Header file of RCC HAL Extended module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by Puya under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  21. * All rights reserved.</center></h2>
  22. *
  23. * This software component is licensed by ST under BSD 3-Clause license,
  24. * the "License"; You may not use this file except in compliance with the
  25. * License. You may obtain a copy of the License at:
  26. * opensource.org/licenses/BSD-3-Clause
  27. *
  28. ******************************************************************************
  29. */
  30. /* Define to prevent recursive inclusion -------------------------------------*/
  31. #ifndef __PY32F002B_HAL_RCC_EX_H
  32. #define __PY32F002B_HAL_RCC_EX_H
  33. #ifdef __cplusplus
  34. extern "C" {
  35. #endif
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "py32f002b_hal_def.h"
  38. /** @addtogroup PY32F002B_HAL_Driver
  39. * @{
  40. */
  41. /** @addtogroup RCCEx
  42. * @{
  43. */
  44. /* Exported types ------------------------------------------------------------*/
  45. /** @defgroup RCCEx_Exported_Types RCCEx Exported Types
  46. * @{
  47. */
  48. /**
  49. * @brief RCC extended clocks structure definition
  50. */
  51. typedef struct
  52. {
  53. uint32_t PeriphClockSelection; /*!< The Extended Clock to be configured.
  54. This parameter can be a value of @ref RCCEx_Periph_Clock_Selection */
  55. #if defined(RCC_CCIPR_COMP1SEL)
  56. uint32_t Comp1ClockSelection; /*!< Specifies COMP1 clock source.
  57. This parameter can be a value of @ref RCCEx_COMP1_Clock_Source */
  58. #endif
  59. #if defined(RCC_CCIPR_COMP2SEL)
  60. uint32_t Comp2ClockSelection; /*!< Specifies COMP2 clock source.
  61. This parameter can be a value of @ref RCCEx_COMP2_Clock_Source */
  62. #endif
  63. #if defined(RCC_CCIPR_LPTIMSEL)
  64. uint32_t LptimClockSelection; /*!< Specifies LPTIM1 clock source
  65. This parameter can be a value of @ref RCCEx_LPTIM1_Clock_Source */
  66. #endif
  67. } RCC_PeriphCLKInitTypeDef;
  68. /**
  69. * @}
  70. */
  71. /* Exported constants --------------------------------------------------------*/
  72. /** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants
  73. * @{
  74. */
  75. #if defined(RCC_BDCR_LSCOSEL)
  76. /** @defgroup RCCEx_LSCO_Clock_Source Low Speed Clock Source
  77. * @{
  78. */
  79. #define RCC_LSCOSOURCE_LSI 0x00000000U /*!< LSI selection for low speed clock output */
  80. #define RCC_LSCOSOURCE_LSE RCC_BDCR_LSCOSEL /*!< LSE selection for low speed clock output */
  81. /**
  82. * @}
  83. */
  84. #endif
  85. /** @defgroup RCCEx_Periph_Clock_Selection Periph Clock Selection
  86. * @{
  87. */
  88. #if defined(RCC_CCIPR_COMP1SEL)
  89. #define RCC_PERIPHCLK_COMP1 0x00000002U
  90. #endif /* RCC_CCIPR_COMP1SEL */
  91. #if defined(RCC_CCIPR_COMP2SEL)
  92. #define RCC_PERIPHCLK_COMP2 0x00000020U
  93. #endif /* RCC_CCIPR_COMP2SEL */
  94. #if defined(RCC_CCIPR_LPTIMSEL)
  95. #define RCC_PERIPHCLK_LPTIM 0x00000200U
  96. #endif /* RCC_CCIPR_LPTIM1SEL */
  97. /**
  98. * @}
  99. */
  100. #if defined(RCC_CCIPR_COMP1SEL)
  101. /** @defgroup RCCEx_COMP1_Clock_Source RCC COMP1 Clock Source
  102. * @{
  103. */
  104. #define RCC_COMP1CLKSOURCE_PCLK 0x00000000U /*!< APB clock selected as COMP1 clock */
  105. #define RCC_COMP1CLKSOURCE_LSC RCC_CCIPR_COMP1SEL /*!< LSC clock selected as COMP1 clock */
  106. /**
  107. * @}
  108. */
  109. #endif /* RCC_CCIPR_COMP1SEL */
  110. #if defined(RCC_CCIPR_COMP2SEL)
  111. /** @defgroup RCCEx_COMP2_Clock_Source RCC COMP2 Clock Source
  112. * @{
  113. */
  114. #define RCC_COMP2CLKSOURCE_PCLK 0x00000000U /*!< APB clock selected as COMP2 clock */
  115. #define RCC_COMP2CLKSOURCE_LSC RCC_CCIPR_COMP2SEL /*!< LSC clock selected as COMP2 clock */
  116. /**
  117. * @}
  118. */
  119. #endif /* RCC_CCIPR_COMP1SEL */
  120. #if defined(RCC_CCIPR_LPTIMSEL)
  121. /** @defgroup RCCEx_LPTIM1_Clock_Source RCC LPTIM1 Clock Source
  122. * @{
  123. */
  124. #define RCC_LPTIMCLKSOURCE_PCLK 0x00000000U /*!< APB clock selected as LPTimer 1 clock */
  125. #define RCC_LPTIMCLKSOURCE_LSI RCC_CCIPR_LPTIMSEL_0 /*!< LSI clock selected as LPTimer 1 clock */
  126. #define RCC_LPTIMCLKSOURCE_LSE RCC_CCIPR_LPTIMSEL /*!< LSE clock selected as LPTimer 1 clock */
  127. /**
  128. * @}
  129. */
  130. #endif /* RCC_CCIPR_LPTIM1SEL */
  131. /**
  132. * @}
  133. */
  134. /* Exported macros -----------------------------------------------------------*/
  135. /** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros
  136. * @{
  137. */
  138. #if defined(RCC_CCIPR_COMP1SEL)
  139. /** @brief Macro to configure the COMP1 clock (COMP1CLK).
  140. *
  141. * @param __COMP1_CLKSOURCE__ specifies the COMP1 clock source.
  142. * This parameter can be one of the following values:
  143. * @arg @ref RCC_COMP1CLKSOURCE_PCLK PCLK selected as COMP1 clock
  144. * @arg @ref RCC_COMP1CLKSOURCE_HSI LSC selected as COMP1 clock
  145. */
  146. #define __HAL_RCC_COMP1_CONFIG(__COMP1_CLKSOURCE__) \
  147. do { \
  148. register uint32_t regTmp1 = (RCC->CCIPR & RCC_CCIPR_COMP2SEL); \
  149. regTmp1 = regTmp1 | (regTmp1 >> 2); \
  150. register uint32_t regTmp2 = ((uint32_t)(__COMP1_CLKSOURCE__)) | (((uint32_t)(__COMP1_CLKSOURCE__)) >> 2); \
  151. MODIFY_REG(RCC->CCIPR, RCC_CCIPR_COMP1SEL, (regTmp1 | regTmp2)); \
  152. } while(0U)
  153. /** @brief Macro to get the COMP1 clock source.
  154. * @retval The clock source can be one of the following values:
  155. * @arg @ref RCC_COMP1CLKSOURCE_PCLK1 PCLK selected as COMP1 clock
  156. * @arg @ref RCC_COMP1CLKSOURCE_HSI LSC selected as COMP1 clock
  157. */
  158. #define __HAL_RCC_GET_COMP1_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_COMP1SEL)))
  159. #endif /* RCC_CCIPR_COMP1SEL */
  160. #if defined(RCC_CCIPR_COMP2SEL)
  161. /** @brief Macro to configure the COMP2 clock (COMP2CLK).
  162. *
  163. * @param __COMP2_CLKSOURCE__ specifies the COMP2 clock source.
  164. * This parameter can be one of the following values:
  165. * @arg @ref RCC_COMP2CLKSOURCE_PCLK PCLK selected as COMP2 clock
  166. * @arg @ref RCC_COMP2CLKSOURCE_HSI LSC selected as COMP2 clock
  167. */
  168. #define __HAL_RCC_COMP2_CONFIG(__COMP2_CLKSOURCE__) \
  169. do { \
  170. register uint32_t regTmp1 = (RCC->CCIPR & RCC_CCIPR_COMP1SEL); \
  171. regTmp1 = regTmp1 | (regTmp1 >> 2); \
  172. register uint32_t regTmp2 = ((uint32_t)(__COMP2_CLKSOURCE__)) | (((uint32_t)(__COMP2_CLKSOURCE__)) >> 2); \
  173. MODIFY_REG(RCC->CCIPR, RCC_CCIPR_COMP2SEL, (regTmp1 | regTmp2)); \
  174. } while(0U)
  175. /** @brief Macro to get the COMP2 clock source.
  176. * @retval The clock source can be one of the following values:
  177. * @arg @ref RCC_COMP2CLKSOURCE_PCLK1 PCLK selected as COMP2 clock
  178. * @arg @ref RCC_COMP2CLKSOURCE_HSI LSC selected as COMP2 clock
  179. */
  180. #define __HAL_RCC_GET_COMP2_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_COMP2SEL)))
  181. #endif /* RCC_CCIPR_COMP2SEL */
  182. #if defined(RCC_CCIPR_LPTIMSEL)
  183. /** @brief Macro to configure the LPTIM1 clock (LPTIM1CLK).
  184. *
  185. * @param __LPTIM1_CLKSOURCE__ specifies the LPTIM1 clock source.
  186. * This parameter can be one of the following values:
  187. * @arg @ref RCC_LPTIM1CLKSOURCE_PCLK1 PCLK1 selected as LPTIM1 clock
  188. * @arg @ref RCC_LPTIM1CLKSOURCE_LSI HSI selected as LPTIM1 clock
  189. * @arg @ref RCC_LPTIM1CLKSOURCE_HSI LSI selected as LPTIM1 clock
  190. * @arg @ref RCC_LPTIM1CLKSOURCE_LSE LSE selected as LPTIM1 clock
  191. * @note Depending on devices and packages, some clocks may not be available.
  192. * Refer to device datasheet for clocks availability.
  193. */
  194. #define __HAL_RCC_LPTIM_CONFIG(__LPTIM1_CLKSOURCE__) \
  195. do { \
  196. register uint32_t regTmp1 = (RCC->CCIPR & 0x0000FF00U); \
  197. register uint32_t regTmp2 = ((RCC->CCIPR & 0x0000FF00U) >> 2); \
  198. register uint32_t regTmp = regTmp1 | regTmp2; \
  199. MODIFY_REG(RCC->CCIPR, RCC_CCIPR_LPTIMSEL, (((uint32_t)(__LPTIM1_CLKSOURCE__)) | regTmp)); \
  200. } while(0U)
  201. /** @brief Macro to get the LPTIM clock source.
  202. * @retval The clock source can be one of the following values:
  203. * @arg @ref RCC_LPTIMCLKSOURCE_PCLK1 PCLK1 selected as LPTIM clock
  204. * @arg @ref RCC_LPTIMCLKSOURCE_LSI HSI selected as LPTIM clock
  205. * @arg @ref RCC_LPTIMCLKSOURCE_LSE LSE selected as LPTIM clock
  206. * @note Depending on devices and packages, some clocks may not be available.
  207. * Refer to device datasheet for clocks availability.
  208. */
  209. #define __HAL_RCC_GET_LPTIM_SOURCE() ((uint32_t)(READ_BIT(RCC->CCIPR, RCC_CCIPR_LPTIMSEL)))
  210. #endif /* RCC_CCIPR_LPTIM1SEL */
  211. /** @defgroup RCCEx_Flags_Interrupts_Management Flags Interrupts Management
  212. * @brief macros to manage the specified RCC Flags and interrupts.
  213. * @{
  214. */
  215. /**
  216. * @}
  217. */
  218. /**
  219. * @}
  220. */
  221. /* Exported functions --------------------------------------------------------*/
  222. /** @addtogroup RCCEx_Exported_Functions
  223. * @{
  224. */
  225. /** @addtogroup RCCEx_Exported_Functions_Group1
  226. * @{
  227. */
  228. HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
  229. void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit);
  230. uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk);
  231. /**
  232. * @}
  233. */
  234. /** @addtogroup RCCEx_Exported_Functions_Group2
  235. * @{
  236. */
  237. #if defined(RCC_BDCR_LSCOEN)
  238. void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource);
  239. void HAL_RCCEx_DisableLSCO(void);
  240. #endif
  241. /**
  242. * @}
  243. */
  244. /**
  245. * @}
  246. */
  247. /* Private macros ------------------------------------------------------------*/
  248. /** @defgroup RCCEx_Private_Macros RCCEx Private Macros
  249. * @{
  250. */
  251. #if defined(RCC_BDCR_LSCOSEL)
  252. #define IS_RCC_LSCOSOURCE(__SOURCE__) (((__SOURCE__) == RCC_LSCOSOURCE_LSI) || \
  253. ((__SOURCE__) == RCC_LSCOSOURCE_LSE))
  254. #endif
  255. #if defined(RCC_CCIPR_COMP1SEL)
  256. #define IS_RCC_COMP1CLKSOURCE(__SOURCE__) \
  257. (((__SOURCE__) == RCC_COMP1CLKSOURCE_PCLK) || \
  258. ((__SOURCE__) == RCC_COMP1CLKSOURCE_LSC))
  259. #endif /* RCC_CCIPR_COMP1SEL */
  260. #if defined(RCC_CCIPR_COMP2SEL)
  261. #define IS_RCC_COMP2CLKSOURCE(__SOURCE__) \
  262. (((__SOURCE__) == RCC_COMP2CLKSOURCE_PCLK) || \
  263. ((__SOURCE__) == RCC_COMP2CLKSOURCE_LSC))
  264. #endif /* RCC_CCIPR_COMP2SEL */
  265. #if defined(RCC_CCIPR_LPTIMSEL)
  266. #define IS_RCC_LPTIM1CLKSOURCE(__SOURCE__) \
  267. (((__SOURCE__) == RCC_LPTIMCLKSOURCE_PCLK)|| \
  268. ((__SOURCE__) == RCC_LPTIMCLKSOURCE_LSI) || \
  269. ((__SOURCE__) == RCC_LPTIMCLKSOURCE_LSE))
  270. #endif /* RCC_CCIPR_LPTIM1SEL */
  271. #define IS_RCC_PERIPHCLOCK(__SELECTION__) \
  272. ((((__SELECTION__) & RCC_PERIPHCLK_COMP1) == RCC_PERIPHCLK_COMP1) || \
  273. (((__SELECTION__) & RCC_PERIPHCLK_COMP2) == RCC_PERIPHCLK_COMP2) || \
  274. (((__SELECTION__) & RCC_PERIPHCLK_LPTIM) == RCC_PERIPHCLK_LPTIM))
  275. /**
  276. * @}
  277. */
  278. /**
  279. * @}
  280. */
  281. /**
  282. * @}
  283. */
  284. #ifdef __cplusplus
  285. }
  286. #endif
  287. #endif /* __PY32F002B_HAL_RCC_EX_H */
  288. /************************ (C) COPYRIGHT Puya *****END OF FILE****/