py32f002b_ll_pwr.h 12 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f002b_ll_pwr.h
  4. * @author MCU Application Team
  5. * @brief Header file of PWR LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by Puya under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  21. * All rights reserved.</center></h2>
  22. *
  23. * This software component is licensed by ST under BSD 3-Clause license,
  24. * the "License"; You may not use this file except in compliance with the
  25. * License. You may obtain a copy of the License at:
  26. * opensource.org/licenses/BSD-3-Clause
  27. *
  28. ******************************************************************************
  29. */
  30. /* Define to prevent recursive inclusion -------------------------------------*/
  31. #ifndef PY32F002B_LL_PWR_H
  32. #define PY32F002B_LL_PWR_H
  33. #ifdef __cplusplus
  34. extern "C" {
  35. #endif
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "py32f0xx.h"
  38. /** @addtogroup PY32F002B_LL_Driver
  39. * @{
  40. */
  41. #if defined(PWR)
  42. /** @defgroup PWR_LL PWR
  43. * @{
  44. */
  45. /* Private types -------------------------------------------------------------*/
  46. /* Private variables ---------------------------------------------------------*/
  47. /* Private constants ---------------------------------------------------------*/
  48. /* Private macros ------------------------------------------------------------*/
  49. /* Exported types ------------------------------------------------------------*/
  50. /* Exported constants --------------------------------------------------------*/
  51. /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
  52. * @{
  53. */
  54. /** @defgroup PWR_LL_EC_WAKEUP_HSION_MODE WAKEUP HSI ON MODE
  55. * @{
  56. */
  57. #define LL_PWR_WAKEUP_HSION_AFTER_MR 0x00000000U /* Wake up from the STOP mode, After the MR becomes stable, enable HSI */
  58. #define LL_PWR_WAKEUP_HSION_IMMEDIATE PWR_CR1_HSION_CTRL /* Wake up from the STOP mode, Enable HSI immediately */
  59. /**
  60. * @}
  61. */
  62. /** @defgroup PWR_LL_EC_SRAM_RETENTIONE_VOLTAGE_CONTROL SRAM RETENTIONE VOLTAGE CONTROL
  63. * @{
  64. */
  65. #define LL_PWR_SRAM_RETENTION_VOLT_CTRL_LDO 0x00000001U /* SRAM voltage is the same as LDO output */
  66. #define LL_PWR_SRAM_RETENTION_VOLT_CTRL_LOW 0x00000000U /* SRAM voltage is low */
  67. /**
  68. * @}
  69. */
  70. /** @defgroup PWR_LL_EC_LOW_POWER_REGULATOR_MODE LOW POWER REGULATOR MODE
  71. * @{
  72. */
  73. #define LL_PWR_LPR_MODE_MR 0x00000000U /* MR mode */
  74. #define LL_PWR_LPR_MODE_LPR PWR_CR1_LPR_0 /* Low Power Run mode */
  75. #if defined(PWR_DEEPSTOP_SUPPORT)
  76. #define LL_PWR_LPR_MODE_DLPR PWR_CR1_LPR_1 /* Deep Low Power Run mode */
  77. #endif /* PWR_DEEPSTOP_SUPPORT */
  78. /**
  79. * @}
  80. */
  81. /** @defgroup PWR_LL_EC_WAKEUP_FLASH_DELAY WAKEUP FLASH DELAY
  82. * @{
  83. */
  84. #define LL_PWR_WAKEUP_FLASH_DELAY_0US (PWR_CR1_FLS_SLPTIME_1 | PWR_CR1_FLS_SLPTIME_0) /* Wake up from the STOP mode, Enable flash immediately*/
  85. #define LL_PWR_WAKEUP_FLASH_DELAY_2US ( PWR_CR1_FLS_SLPTIME_0) /* Wake up from the STOP mode, Delay 2us enable flash*/
  86. #define LL_PWR_WAKEUP_FLASH_DELAY_3US (PWR_CR1_FLS_SLPTIME_1 ) /* Wake up from the STOP mode, Delay 3us enable flash*/
  87. #define LL_PWR_WAKEUP_FLASH_DELAY_5US 0x00000000U /* Wake up from the STOP mode, Delay 5us enable flash*/
  88. /**
  89. * @}
  90. */
  91. /** @defgroup PWR_LL_EC_BIAS_CURRENTS_SOURCE BIAS CURRENTS SOURCE
  92. * @{
  93. */
  94. #define LL_PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES 0x00000000U /* MR bias currents source load from Factory config bytes */
  95. #define LL_PWR_BIAS_CURRENTS_FROM_BIAS_CR (PWR_CR1_BIAS_CR_SEL) /* MR bias currents source load from BIAS_CR */
  96. /**
  97. * @}
  98. */
  99. /** @defgroup PWR_LL_EC_GPIO_BIT GPIO BIT
  100. * @{
  101. */
  102. /**
  103. * @}
  104. */
  105. /**
  106. * @}
  107. */
  108. /* Exported macro ------------------------------------------------------------*/
  109. /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
  110. * @{
  111. */
  112. /** @defgroup PWR_LL_EM_WRITE_READ Common Write and read registers Macros
  113. * @{
  114. */
  115. /**
  116. * @brief Write a value in PWR register
  117. * @param __REG__ Register to be written
  118. * @param __VALUE__ Value to be written in the register
  119. * @retval None
  120. */
  121. #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
  122. /**
  123. * @brief Read a value in PWR register
  124. * @param __REG__ Register to be read
  125. * @retval Register value
  126. */
  127. #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
  128. /**
  129. * @}
  130. */
  131. /**
  132. * @}
  133. */
  134. /* Exported functions --------------------------------------------------------*/
  135. /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
  136. * @{
  137. */
  138. /** @defgroup PWR_LL_EF_Configuration Configuration
  139. * @{
  140. */
  141. /**
  142. * @brief Set the HSI turn on mode after wake up
  143. * @rmtoll CR1 HSION_CTRL LL_PWR_SetWakeUpHSIOnMode
  144. * @param HsiOnMode This parameter can be one of the following values:
  145. * @arg @ref LL_PWR_WAKEUP_HSION_AFTER_MR
  146. * @arg @ref LL_PWR_WAKEUP_HSION_IMMEDIATE
  147. * @retval None
  148. */
  149. __STATIC_INLINE void LL_PWR_SetWakeUpHSIOnMode(uint32_t HsiOnMode)
  150. {
  151. MODIFY_REG(PWR->CR1, PWR_CR1_HSION_CTRL, HsiOnMode);
  152. }
  153. /**
  154. * @brief Get the HSI turn on mode after wake up
  155. * @rmtoll CR1 HSION_CTRL LL_PWR_GetWakeUpHSIOnMode
  156. * @retval Returned value can be one of the following values:
  157. * @arg @ref LL_PWR_WAKEUP_HSION_AFTER_MR
  158. * @arg @ref LL_PWR_WAKEUP_HSION_IMMEDIATE
  159. */
  160. __STATIC_INLINE uint32_t LL_PWR_GetWakeUpHSIOnMode(void)
  161. {
  162. return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_HSION_CTRL));
  163. }
  164. #if defined(PWR_DEEPSTOP_SUPPORT)
  165. /**
  166. * @brief Set SRAM retention voltage control in deep stop mode.
  167. * @note Depending on devices and packages, Deep Low Power Run mode may not be available.
  168. * Refer to device datasheet for Deep Low Power Run mode availability.
  169. * @param VoltCtrl This parameter can be one of the following values:
  170. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LDO
  171. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LOW
  172. * @retval None
  173. */
  174. __STATIC_INLINE void LL_PWR_SetDeepStopModeSramVoltCtrl(uint32_t VoltCtrl)
  175. {
  176. MODIFY_REG(PWR->CR1, PWR_CR1_SRAM_RETV_DLP, (VoltCtrl << PWR_CR1_SRAM_RETV_DLP_Pos));
  177. }
  178. /**
  179. * @brief Get SRAM retention voltage control in deep stop mode.
  180. * @note Depending on devices and packages, Deep Low Power Run mode may not be available.
  181. * Refer to device datasheet for Deep Low Power Run mode availability.
  182. * @retval Returned value can be one of the following values:
  183. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LDO
  184. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LOW
  185. */
  186. __STATIC_INLINE uint32_t LL_PWR_GetDeepStopModeSramVoltCtrl(void)
  187. {
  188. return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_SRAM_RETV_DLP) >> PWR_CR1_SRAM_RETV_DLP_Pos);
  189. }
  190. #endif /* PWR_DEEPSTOP_SUPPORT */
  191. /**
  192. * @brief Set SRAM retention voltage control in stop mode.
  193. * @param VoltCtrl This parameter can be one of the following values:
  194. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LDO
  195. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LOW
  196. * @retval None
  197. */
  198. __STATIC_INLINE void LL_PWR_SetStopModeSramVoltCtrl(uint32_t VoltCtrl)
  199. {
  200. MODIFY_REG(PWR->CR1, PWR_CR1_SRAM_RETV, (VoltCtrl << PWR_CR1_SRAM_RETV_Pos));
  201. }
  202. /**
  203. * @brief Get SRAM retention voltage control in stop mode.
  204. * @retval Returned value can be one of the following values:
  205. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LDO
  206. * @arg @ref LL_PWR_SRAM_RETENTION_VOLT_CTRL_LOW
  207. */
  208. __STATIC_INLINE uint32_t LL_PWR_GetStopModeSramVoltCtrl(void)
  209. {
  210. return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_SRAM_RETV) >> PWR_CR1_SRAM_RETV_Pos);
  211. }
  212. /**
  213. * @brief Set the Low power regulator mode.
  214. * @param Mode This parameter can be one of the following values:
  215. * @arg @ref LL_PWR_LPR_MODE_MR
  216. * @arg @ref LL_PWR_LPR_MODE_LPR
  217. * @arg @ref LL_PWR_LPR_MODE_DLPR
  218. * @note Depending on devices and packages, Deep Low Power Run mode may not be available.
  219. * Refer to device datasheet for Deep Low Power Run mode availability.
  220. * @retval None
  221. */
  222. __STATIC_INLINE void LL_PWR_SetLprMode(uint32_t Mode)
  223. {
  224. MODIFY_REG(PWR->CR1, PWR_CR1_LPR, Mode);
  225. }
  226. /**
  227. * @brief Get the Low power regulator mode.
  228. * @retval Returned value can be one of the following values:
  229. * @arg @ref LL_PWR_LPR_MODE_MR
  230. * @arg @ref LL_PWR_LPR_MODE_LPR
  231. * @arg @ref LL_PWR_LPR_MODE_DLPR
  232. */
  233. __STATIC_INLINE uint32_t LL_PWR_GetLprMode(void)
  234. {
  235. return (READ_BIT(PWR->CR1, PWR_CR1_LPR));
  236. }
  237. /**
  238. * @brief Set the flash delay time after wake up
  239. * @rmtoll CR1 FLS_SLPTIME LL_PWR_SetWakeUpFlashDelay
  240. * @param FlashDelay This parameter can be one of the following values:
  241. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_0US
  242. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_2US
  243. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_3US
  244. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_5US
  245. * @retval None
  246. */
  247. __STATIC_INLINE void LL_PWR_SetWakeUpFlashDelay(uint32_t FlashDelay)
  248. {
  249. MODIFY_REG(PWR->CR1, PWR_CR1_FLS_SLPTIME, FlashDelay);
  250. }
  251. /**
  252. * @brief Get the flash delay time after wake up
  253. * @rmtoll CR1 FLS_SLPTIME LL_PWR_GetWakeUpFlashDelay
  254. * @retval Returned value can be one of the following values:
  255. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_0US
  256. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_2US
  257. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_3US
  258. * @arg @ref LL_PWR_WAKEUP_FLASH_DELAY_5US
  259. */
  260. __STATIC_INLINE uint32_t LL_PWR_GetWakeUpFlashDelay(void)
  261. {
  262. return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_FLS_SLPTIME));
  263. }
  264. /**
  265. * @brief Set the bias currents load source and bias currents config value.
  266. * @rmtoll CR1 BIAS_CR_SEL | BIAS_CR LL_PWR_SetBiasCurrents
  267. * @param BiasCurSel This parameter can be one of the following values:
  268. * @arg @ref LL_PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES
  269. * @arg @ref LL_PWR_BIAS_CURRENTS_FROM_BIAS_CR
  270. * @param BiasCur This parameter must be a number between 0x0000 and 0xFFFF
  271. * @retval None
  272. */
  273. __STATIC_INLINE void LL_PWR_SetBiasCurrents(uint32_t BiasCurSel, uint32_t BiasCur)
  274. {
  275. MODIFY_REG(PWR->CR1, (PWR_CR1_BIAS_CR_SEL | PWR_CR1_BIAS_CR), (BiasCurSel | BiasCur));
  276. }
  277. /**
  278. * @brief Get the bias currents load source
  279. * @rmtoll CR1 BIAS_CR_SEL LL_PWR_GetBiasCurrentsLoadSource
  280. * @retval Returned value can be one of the following values:
  281. * @arg @ref LL_PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES
  282. * @arg @ref LL_PWR_BIAS_CURRENTS_FROM_BIAS_CR
  283. */
  284. __STATIC_INLINE uint32_t LL_PWR_GetBiasCurrentsLoadSource(void)
  285. {
  286. return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_BIAS_CR_SEL));
  287. }
  288. /**
  289. * @brief Get the bias currents config value
  290. * @rmtoll CR1 BIAS_CR LL_PWR_GetBiasCRValue
  291. * @retval Returned value can be number between 0x00 and 0x0F
  292. */
  293. __STATIC_INLINE uint32_t LL_PWR_GetBiasCRValue(void)
  294. {
  295. return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_BIAS_CR));
  296. }
  297. /**
  298. * @}
  299. */
  300. #if defined(USE_FULL_LL_DRIVER)
  301. /** @defgroup PWR_LL_EF_Init De-initialization function
  302. * @{
  303. */
  304. ErrorStatus LL_PWR_DeInit(void);
  305. /**
  306. * @}
  307. */
  308. #endif /* USE_FULL_LL_DRIVER */
  309. /**
  310. * @}
  311. */
  312. /**
  313. * @}
  314. */
  315. #endif /* defined(PWR) */
  316. /**
  317. * @}
  318. */
  319. #ifdef __cplusplus
  320. }
  321. #endif
  322. #endif /* PY32F002B_LL_PWR_H */
  323. /************************ (C) COPYRIGHT Puya *****END OF FILE****/