py32f002b_ll_usart.h 71 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f002b_ll_usart.h
  4. * @author MCU Application Team
  5. * @brief Header file of USART LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by Puya under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  21. * All rights reserved.</center></h2>
  22. *
  23. * This software component is licensed by ST under BSD 3-Clause license,
  24. * the "License"; You may not use this file except in compliance with the
  25. * License. You may obtain a copy of the License at:
  26. * opensource.org/licenses/BSD-3-Clause
  27. *
  28. ******************************************************************************
  29. */
  30. /* Define to prevent recursive inclusion -------------------------------------*/
  31. #ifndef __PY32F002B_LL_USART_H
  32. #define __PY32F002B_LL_USART_H
  33. #ifdef __cplusplus
  34. extern "C" {
  35. #endif
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "py32f0xx.h"
  38. /** @addtogroup PY32F002B_LL_Driver
  39. * @{
  40. */
  41. #if defined (USART1)
  42. /** @defgroup USART_LL USART
  43. * @{
  44. */
  45. /* Private types -------------------------------------------------------------*/
  46. /* Private variables ---------------------------------------------------------*/
  47. /* Private constants ---------------------------------------------------------*/
  48. /** @defgroup USART_LL_Private_Constants USART Private Constants
  49. * @{
  50. */
  51. /**
  52. * @}
  53. */
  54. /* Private macros ------------------------------------------------------------*/
  55. #if defined(USE_FULL_LL_DRIVER)
  56. /** @defgroup USART_LL_Private_Macros USART Private Macros
  57. * @{
  58. */
  59. /**
  60. * @}
  61. */
  62. #endif /*USE_FULL_LL_DRIVER*/
  63. /* Exported types ------------------------------------------------------------*/
  64. #if defined(USE_FULL_LL_DRIVER)
  65. /** @defgroup USART_LL_ES_INIT USART Exported Init structures
  66. * @{
  67. */
  68. /**
  69. * @brief LL USART Init Structure definition
  70. */
  71. typedef struct
  72. {
  73. uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
  74. This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
  75. uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
  76. This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
  77. This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
  78. uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
  79. This parameter can be a value of @ref USART_LL_EC_STOPBITS.
  80. This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
  81. uint32_t Parity; /*!< Specifies the parity mode.
  82. This parameter can be a value of @ref USART_LL_EC_PARITY.
  83. This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
  84. uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
  85. This parameter can be a value of @ref USART_LL_EC_DIRECTION.
  86. This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
  87. uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
  88. This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
  89. This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
  90. uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
  91. This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
  92. This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
  93. } LL_USART_InitTypeDef;
  94. /**
  95. * @brief LL USART Clock Init Structure definition
  96. */
  97. typedef struct
  98. {
  99. uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
  100. This parameter can be a value of @ref USART_LL_EC_CLOCK.
  101. USART HW configuration can be modified afterwards using unitary functions
  102. @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
  103. For more details, refer to description of this function. */
  104. uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
  105. This parameter can be a value of @ref USART_LL_EC_POLARITY.
  106. USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
  107. For more details, refer to description of this function. */
  108. uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
  109. This parameter can be a value of @ref USART_LL_EC_PHASE.
  110. USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
  111. For more details, refer to description of this function. */
  112. uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
  113. data bit (MSB) has to be output on the SCLK pin in synchronous mode.
  114. This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
  115. USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
  116. For more details, refer to description of this function. */
  117. } LL_USART_ClockInitTypeDef;
  118. /**
  119. * @}
  120. */
  121. #endif /* USE_FULL_LL_DRIVER */
  122. /* Exported constants --------------------------------------------------------*/
  123. /** @defgroup USART_LL_Exported_Constants USART Exported Constants
  124. * @{
  125. */
  126. /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
  127. * @brief Flags defines which can be used with LL_USART_ReadReg function
  128. * @{
  129. */
  130. #define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
  131. #define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
  132. #define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
  133. #define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
  134. #define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
  135. #define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
  136. #define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
  137. #define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
  138. #define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
  139. /**
  140. * @}
  141. */
  142. /** @defgroup USART_LL_EC_IT IT Defines
  143. * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
  144. * @{
  145. */
  146. #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
  147. #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
  148. #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
  149. #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
  150. #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
  151. #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
  152. #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
  153. /**
  154. * @}
  155. */
  156. /** @defgroup USART_LL_EC_DIRECTION Communication Direction
  157. * @{
  158. */
  159. #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
  160. #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
  161. #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
  162. #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
  163. /**
  164. * @}
  165. */
  166. /** @defgroup USART_LL_EC_PARITY Parity Control
  167. * @{
  168. */
  169. #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
  170. #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
  171. #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
  172. /**
  173. * @}
  174. */
  175. /** @defgroup USART_LL_EC_WAKEUP Wakeup
  176. * @{
  177. */
  178. #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
  179. #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
  180. /**
  181. * @}
  182. */
  183. /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
  184. * @{
  185. */
  186. #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
  187. #define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
  188. /**
  189. * @}
  190. */
  191. /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
  192. * @{
  193. */
  194. #define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
  195. #if defined(USART_CR3_OVER8)
  196. #define LL_USART_OVERSAMPLING_8 USART_CR3_OVER8 /*!< Oversampling by 8 */
  197. #endif /* USART_OverSampling_Feature */
  198. /**
  199. * @}
  200. */
  201. #if defined(USE_FULL_LL_DRIVER)
  202. /** @defgroup USART_LL_EC_CLOCK Clock Signal
  203. * @{
  204. */
  205. #define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
  206. #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
  207. /**
  208. * @}
  209. */
  210. #endif /*USE_FULL_LL_DRIVER*/
  211. /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
  212. * @{
  213. */
  214. #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
  215. #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
  216. /**
  217. * @}
  218. */
  219. /** @defgroup USART_LL_EC_PHASE Clock Phase
  220. * @{
  221. */
  222. #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
  223. #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
  224. /**
  225. * @}
  226. */
  227. /** @defgroup USART_LL_EC_POLARITY Clock Polarity
  228. * @{
  229. */
  230. #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
  231. #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
  232. /**
  233. * @}
  234. */
  235. /** @defgroup USART_LL_EC_STOPBITS Stop Bits
  236. * @{
  237. */
  238. #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
  239. #define LL_USART_STOPBITS_2 USART_CR2_STOP /*!< 2 stop bits */
  240. /**
  241. * @}
  242. */
  243. /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
  244. * @{
  245. */
  246. #define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
  247. #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
  248. #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
  249. #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
  250. /**
  251. * @}
  252. */
  253. /** @defgroup USART_LL_EC_AUTOBAUNDMODE Auto baud rate detection mode
  254. * @{
  255. */
  256. #define LL_USART_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */
  257. #define LL_USART_AUTOBAUDRATE_ONFALLINGEDGE USART_CR3_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */
  258. /**
  259. * @}
  260. */
  261. /**
  262. * @}
  263. */
  264. /* Exported macro ------------------------------------------------------------*/
  265. /** @defgroup USART_LL_Exported_Macros USART Exported Macros
  266. * @{
  267. */
  268. /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
  269. * @{
  270. */
  271. /**
  272. * @brief Write a value in USART register
  273. * @param __INSTANCE__ USART Instance
  274. * @param __REG__ Register to be written
  275. * @param __VALUE__ Value to be written in the register
  276. * @retval None
  277. */
  278. #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  279. /**
  280. * @brief Read a value in USART register
  281. * @param __INSTANCE__ USART Instance
  282. * @param __REG__ Register to be read
  283. * @retval Register value
  284. */
  285. #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  286. /**
  287. * @}
  288. */
  289. /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
  290. * @{
  291. */
  292. /**
  293. * @brief Compute USARTDIV value according to Peripheral Clock and
  294. * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
  295. * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
  296. * @param __BAUDRATE__ Baud rate value to achieve
  297. * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
  298. */
  299. #define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
  300. #define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
  301. #define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
  302. /* UART BRR = mantissa + overflow + fraction
  303. = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
  304. #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
  305. ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
  306. (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
  307. /**
  308. * @brief Compute USARTDIV value according to Peripheral Clock and
  309. * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
  310. * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
  311. * @param __BAUDRATE__ Baud rate value to achieve
  312. * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
  313. */
  314. #define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
  315. #define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
  316. #define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100)
  317. /* USART BRR = mantissa + overflow + fraction
  318. = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
  319. #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
  320. (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
  321. (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
  322. /**
  323. * @}
  324. */
  325. /**
  326. * @}
  327. */
  328. /* Exported functions --------------------------------------------------------*/
  329. /** @defgroup USART_LL_Exported_Functions USART Exported Functions
  330. * @{
  331. */
  332. /** @defgroup USART_LL_EF_Configuration Configuration functions
  333. * @{
  334. */
  335. /**
  336. * @brief USART Enable
  337. * @rmtoll CR1 UE LL_USART_Enable
  338. * @param USARTx USART Instance
  339. * @retval None
  340. */
  341. __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
  342. {
  343. SET_BIT(USARTx->CR1, USART_CR1_UE);
  344. }
  345. /**
  346. * @brief USART Disable (all USART prescalers and outputs are disabled)
  347. * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
  348. * and current operations are discarded. The configuration of the USART is kept, but all the status
  349. * flags, in the USARTx_SR are set to their default values.
  350. * @rmtoll CR1 UE LL_USART_Disable
  351. * @param USARTx USART Instance
  352. * @retval None
  353. */
  354. __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
  355. {
  356. CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
  357. }
  358. /**
  359. * @brief Indicate if USART is enabled
  360. * @rmtoll CR1 UE LL_USART_IsEnabled
  361. * @param USARTx USART Instance
  362. * @retval State of bit (1 or 0).
  363. */
  364. __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
  365. {
  366. return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
  367. }
  368. /**
  369. * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
  370. * @rmtoll CR1 RE LL_USART_EnableDirectionRx
  371. * @param USARTx USART Instance
  372. * @retval None
  373. */
  374. __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
  375. {
  376. SET_BIT(USARTx->CR1, USART_CR1_RE);
  377. }
  378. /**
  379. * @brief Receiver Disable
  380. * @rmtoll CR1 RE LL_USART_DisableDirectionRx
  381. * @param USARTx USART Instance
  382. * @retval None
  383. */
  384. __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
  385. {
  386. CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
  387. }
  388. /**
  389. * @brief Transmitter Enable
  390. * @rmtoll CR1 TE LL_USART_EnableDirectionTx
  391. * @param USARTx USART Instance
  392. * @retval None
  393. */
  394. __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
  395. {
  396. SET_BIT(USARTx->CR1, USART_CR1_TE);
  397. }
  398. /**
  399. * @brief Transmitter Disable
  400. * @rmtoll CR1 TE LL_USART_DisableDirectionTx
  401. * @param USARTx USART Instance
  402. * @retval None
  403. */
  404. __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
  405. {
  406. CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
  407. }
  408. /**
  409. * @brief Configure simultaneously enabled/disabled states
  410. * of Transmitter and Receiver
  411. * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
  412. * CR1 TE LL_USART_SetTransferDirection
  413. * @param USARTx USART Instance
  414. * @param TransferDirection This parameter can be one of the following values:
  415. * @arg @ref LL_USART_DIRECTION_NONE
  416. * @arg @ref LL_USART_DIRECTION_RX
  417. * @arg @ref LL_USART_DIRECTION_TX
  418. * @arg @ref LL_USART_DIRECTION_TX_RX
  419. * @retval None
  420. */
  421. __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
  422. {
  423. MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
  424. }
  425. /**
  426. * @brief Return enabled/disabled states of Transmitter and Receiver
  427. * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
  428. * CR1 TE LL_USART_GetTransferDirection
  429. * @param USARTx USART Instance
  430. * @retval Returned value can be one of the following values:
  431. * @arg @ref LL_USART_DIRECTION_NONE
  432. * @arg @ref LL_USART_DIRECTION_RX
  433. * @arg @ref LL_USART_DIRECTION_TX
  434. * @arg @ref LL_USART_DIRECTION_TX_RX
  435. */
  436. __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
  437. {
  438. return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
  439. }
  440. /**
  441. * @brief Configure Parity (enabled/disabled and parity mode if enabled).
  442. * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
  443. * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
  444. * (9th or 8th bit depending on data width) and parity is checked on the received data.
  445. * @rmtoll CR1 PS LL_USART_SetParity\n
  446. * CR1 PCE LL_USART_SetParity
  447. * @param USARTx USART Instance
  448. * @param Parity This parameter can be one of the following values:
  449. * @arg @ref LL_USART_PARITY_NONE
  450. * @arg @ref LL_USART_PARITY_EVEN
  451. * @arg @ref LL_USART_PARITY_ODD
  452. * @retval None
  453. */
  454. __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
  455. {
  456. MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
  457. }
  458. /**
  459. * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
  460. * @rmtoll CR1 PS LL_USART_GetParity\n
  461. * CR1 PCE LL_USART_GetParity
  462. * @param USARTx USART Instance
  463. * @retval Returned value can be one of the following values:
  464. * @arg @ref LL_USART_PARITY_NONE
  465. * @arg @ref LL_USART_PARITY_EVEN
  466. * @arg @ref LL_USART_PARITY_ODD
  467. */
  468. __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
  469. {
  470. return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
  471. }
  472. /**
  473. * @brief Set Receiver Wake Up method from Mute mode.
  474. * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
  475. * @param USARTx USART Instance
  476. * @param Method This parameter can be one of the following values:
  477. * @arg @ref LL_USART_WAKEUP_IDLELINE
  478. * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
  479. * @retval None
  480. */
  481. __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
  482. {
  483. MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
  484. }
  485. /**
  486. * @brief Return Receiver Wake Up method from Mute mode
  487. * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
  488. * @param USARTx USART Instance
  489. * @retval Returned value can be one of the following values:
  490. * @arg @ref LL_USART_WAKEUP_IDLELINE
  491. * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
  492. */
  493. __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
  494. {
  495. return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
  496. }
  497. /**
  498. * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
  499. * @rmtoll CR1 M LL_USART_SetDataWidth
  500. * @param USARTx USART Instance
  501. * @param DataWidth This parameter can be one of the following values:
  502. * @arg @ref LL_USART_DATAWIDTH_8B
  503. * @arg @ref LL_USART_DATAWIDTH_9B
  504. * @retval None
  505. */
  506. __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
  507. {
  508. MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
  509. }
  510. /**
  511. * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
  512. * @rmtoll CR1 M LL_USART_GetDataWidth
  513. * @param USARTx USART Instance
  514. * @retval Returned value can be one of the following values:
  515. * @arg @ref LL_USART_DATAWIDTH_8B
  516. * @arg @ref LL_USART_DATAWIDTH_9B
  517. */
  518. __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
  519. {
  520. return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
  521. }
  522. #if defined(USART_CR3_OVER8)
  523. /**
  524. * @brief Set Oversampling to 8-bit or 16-bit mode
  525. * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
  526. * @param USARTx USART Instance
  527. * @param OverSampling This parameter can be one of the following values:
  528. * @arg @ref LL_USART_OVERSAMPLING_16
  529. * @arg @ref LL_USART_OVERSAMPLING_8
  530. * @retval None
  531. */
  532. __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
  533. {
  534. MODIFY_REG(USARTx->CR3, USART_CR3_OVER8, OverSampling);
  535. }
  536. /**
  537. * @brief Return Oversampling mode
  538. * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
  539. * @param USARTx USART Instance
  540. * @retval Returned value can be one of the following values:
  541. * @arg @ref LL_USART_OVERSAMPLING_16
  542. * @arg @ref LL_USART_OVERSAMPLING_8
  543. */
  544. __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
  545. {
  546. return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_OVER8));
  547. }
  548. #endif /* USART_OverSampling_Feature */
  549. /**
  550. * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
  551. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  552. * Synchronous mode is supported by the USARTx instance.
  553. * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
  554. * @param USARTx USART Instance
  555. * @param LastBitClockPulse This parameter can be one of the following values:
  556. * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
  557. * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
  558. * @retval None
  559. */
  560. __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
  561. {
  562. MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
  563. }
  564. /**
  565. * @brief Retrieve Clock pulse of the last data bit output configuration
  566. * (Last bit Clock pulse output to the SCLK pin or not)
  567. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  568. * Synchronous mode is supported by the USARTx instance.
  569. * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
  570. * @param USARTx USART Instance
  571. * @retval Returned value can be one of the following values:
  572. * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
  573. * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
  574. */
  575. __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
  576. {
  577. return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
  578. }
  579. /**
  580. * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
  581. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  582. * Synchronous mode is supported by the USARTx instance.
  583. * @rmtoll CR2 CPHA LL_USART_SetClockPhase
  584. * @param USARTx USART Instance
  585. * @param ClockPhase This parameter can be one of the following values:
  586. * @arg @ref LL_USART_PHASE_1EDGE
  587. * @arg @ref LL_USART_PHASE_2EDGE
  588. * @retval None
  589. */
  590. __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
  591. {
  592. MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
  593. }
  594. /**
  595. * @brief Return phase of the clock output on the SCLK pin in synchronous mode
  596. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  597. * Synchronous mode is supported by the USARTx instance.
  598. * @rmtoll CR2 CPHA LL_USART_GetClockPhase
  599. * @param USARTx USART Instance
  600. * @retval Returned value can be one of the following values:
  601. * @arg @ref LL_USART_PHASE_1EDGE
  602. * @arg @ref LL_USART_PHASE_2EDGE
  603. */
  604. __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
  605. {
  606. return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
  607. }
  608. /**
  609. * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
  610. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  611. * Synchronous mode is supported by the USARTx instance.
  612. * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
  613. * @param USARTx USART Instance
  614. * @param ClockPolarity This parameter can be one of the following values:
  615. * @arg @ref LL_USART_POLARITY_LOW
  616. * @arg @ref LL_USART_POLARITY_HIGH
  617. * @retval None
  618. */
  619. __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
  620. {
  621. MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
  622. }
  623. /**
  624. * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
  625. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  626. * Synchronous mode is supported by the USARTx instance.
  627. * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
  628. * @param USARTx USART Instance
  629. * @retval Returned value can be one of the following values:
  630. * @arg @ref LL_USART_POLARITY_LOW
  631. * @arg @ref LL_USART_POLARITY_HIGH
  632. */
  633. __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
  634. {
  635. return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
  636. }
  637. /**
  638. * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
  639. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  640. * Synchronous mode is supported by the USARTx instance.
  641. * @note Call of this function is equivalent to following function call sequence :
  642. * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
  643. * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
  644. * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
  645. * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
  646. * CR2 CPOL LL_USART_ConfigClock\n
  647. * CR2 LBCL LL_USART_ConfigClock
  648. * @param USARTx USART Instance
  649. * @param Phase This parameter can be one of the following values:
  650. * @arg @ref LL_USART_PHASE_1EDGE
  651. * @arg @ref LL_USART_PHASE_2EDGE
  652. * @param Polarity This parameter can be one of the following values:
  653. * @arg @ref LL_USART_POLARITY_LOW
  654. * @arg @ref LL_USART_POLARITY_HIGH
  655. * @param LBCPOutput This parameter can be one of the following values:
  656. * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
  657. * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
  658. * @retval None
  659. */
  660. __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
  661. {
  662. MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
  663. }
  664. /**
  665. * @brief Enable Clock output on SCLK pin
  666. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  667. * Synchronous mode is supported by the USARTx instance.
  668. * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
  669. * @param USARTx USART Instance
  670. * @retval None
  671. */
  672. __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
  673. {
  674. SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
  675. }
  676. /**
  677. * @brief Disable Clock output on SCLK pin
  678. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  679. * Synchronous mode is supported by the USARTx instance.
  680. * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
  681. * @param USARTx USART Instance
  682. * @retval None
  683. */
  684. __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
  685. {
  686. CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
  687. }
  688. /**
  689. * @brief Indicate if Clock output on SCLK pin is enabled
  690. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  691. * Synchronous mode is supported by the USARTx instance.
  692. * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
  693. * @param USARTx USART Instance
  694. * @retval State of bit (1 or 0).
  695. */
  696. __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
  697. {
  698. return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
  699. }
  700. /**
  701. * @brief Set the length of the stop bits
  702. * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
  703. * @param USARTx USART Instance
  704. * @param StopBits This parameter can be one of the following values:
  705. * @arg @ref LL_USART_STOPBITS_1
  706. * @arg @ref LL_USART_STOPBITS_2
  707. * @retval None
  708. */
  709. __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
  710. {
  711. MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
  712. }
  713. /**
  714. * @brief Retrieve the length of the stop bits
  715. * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
  716. * @param USARTx USART Instance
  717. * @retval Returned value can be one of the following values:
  718. * @arg @ref LL_USART_STOPBITS_1
  719. * @arg @ref LL_USART_STOPBITS_2
  720. */
  721. __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
  722. {
  723. return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
  724. }
  725. /**
  726. * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
  727. * @note Call of this function is equivalent to following function call sequence :
  728. * - Data Width configuration using @ref LL_USART_SetDataWidth() function
  729. * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
  730. * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
  731. * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
  732. * CR1 PCE LL_USART_ConfigCharacter\n
  733. * CR1 M LL_USART_ConfigCharacter\n
  734. * CR2 STOP LL_USART_ConfigCharacter
  735. * @param USARTx USART Instance
  736. * @param DataWidth This parameter can be one of the following values:
  737. * @arg @ref LL_USART_DATAWIDTH_8B
  738. * @arg @ref LL_USART_DATAWIDTH_9B
  739. * @param Parity This parameter can be one of the following values:
  740. * @arg @ref LL_USART_PARITY_NONE
  741. * @arg @ref LL_USART_PARITY_EVEN
  742. * @arg @ref LL_USART_PARITY_ODD
  743. * @param StopBits This parameter can be one of the following values:
  744. * @arg @ref LL_USART_STOPBITS_1
  745. * @arg @ref LL_USART_STOPBITS_2
  746. * @retval None
  747. */
  748. __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
  749. uint32_t StopBits)
  750. {
  751. MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
  752. MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
  753. }
  754. /**
  755. * @brief Set Address of the USART node.
  756. * @note This is used in multiprocessor communication during Mute mode or Stop mode,
  757. * for wake up with address mark detection.
  758. * @rmtoll CR2 ADD LL_USART_SetNodeAddress
  759. * @param USARTx USART Instance
  760. * @param NodeAddress 4 bit Address of the USART node.
  761. * @retval None
  762. */
  763. __STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
  764. {
  765. MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
  766. }
  767. /**
  768. * @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
  769. * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
  770. * @rmtoll CR2 ADD LL_USART_GetNodeAddress
  771. * @param USARTx USART Instance
  772. * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
  773. */
  774. __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
  775. {
  776. return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
  777. }
  778. /**
  779. * @brief Enable RTS HW Flow Control
  780. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  781. * Hardware Flow control feature is supported by the USARTx instance.
  782. * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
  783. * @param USARTx USART Instance
  784. * @retval None
  785. */
  786. __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
  787. {
  788. SET_BIT(USARTx->CR3, USART_CR3_RTSE);
  789. }
  790. /**
  791. * @brief Disable RTS HW Flow Control
  792. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  793. * Hardware Flow control feature is supported by the USARTx instance.
  794. * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
  795. * @param USARTx USART Instance
  796. * @retval None
  797. */
  798. __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
  799. {
  800. CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
  801. }
  802. /**
  803. * @brief Enable CTS HW Flow Control
  804. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  805. * Hardware Flow control feature is supported by the USARTx instance.
  806. * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
  807. * @param USARTx USART Instance
  808. * @retval None
  809. */
  810. __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
  811. {
  812. SET_BIT(USARTx->CR3, USART_CR3_CTSE);
  813. }
  814. /**
  815. * @brief Disable CTS HW Flow Control
  816. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  817. * Hardware Flow control feature is supported by the USARTx instance.
  818. * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
  819. * @param USARTx USART Instance
  820. * @retval None
  821. */
  822. __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
  823. {
  824. CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
  825. }
  826. /**
  827. * @brief Configure HW Flow Control mode (both CTS and RTS)
  828. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  829. * Hardware Flow control feature is supported by the USARTx instance.
  830. * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
  831. * CR3 CTSE LL_USART_SetHWFlowCtrl
  832. * @param USARTx USART Instance
  833. * @param HardwareFlowControl This parameter can be one of the following values:
  834. * @arg @ref LL_USART_HWCONTROL_NONE
  835. * @arg @ref LL_USART_HWCONTROL_RTS
  836. * @arg @ref LL_USART_HWCONTROL_CTS
  837. * @arg @ref LL_USART_HWCONTROL_RTS_CTS
  838. * @retval None
  839. */
  840. __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
  841. {
  842. MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
  843. }
  844. /**
  845. * @brief Return HW Flow Control configuration (both CTS and RTS)
  846. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  847. * Hardware Flow control feature is supported by the USARTx instance.
  848. * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
  849. * CR3 CTSE LL_USART_GetHWFlowCtrl
  850. * @param USARTx USART Instance
  851. * @retval Returned value can be one of the following values:
  852. * @arg @ref LL_USART_HWCONTROL_NONE
  853. * @arg @ref LL_USART_HWCONTROL_RTS
  854. * @arg @ref LL_USART_HWCONTROL_CTS
  855. * @arg @ref LL_USART_HWCONTROL_RTS_CTS
  856. */
  857. __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
  858. {
  859. return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
  860. }
  861. #if defined(USART_CR3_OVER8)
  862. /**
  863. * @brief Configure USART BRR register for achieving expected Baud Rate value.
  864. * @note Compute and set USARTDIV value in BRR Register (full BRR content)
  865. * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
  866. * @note Peripheral clock and Baud rate values provided as function parameters should be valid
  867. * (Baud rate value != 0)
  868. * @rmtoll BRR BRR LL_USART_SetBaudRate
  869. * @param USARTx USART Instance
  870. * @param PeriphClk Peripheral Clock
  871. * @param OverSampling This parameter can be one of the following values:
  872. * @arg @ref LL_USART_OVERSAMPLING_16
  873. * @arg @ref LL_USART_OVERSAMPLING_8
  874. * @param BaudRate Baud Rate
  875. * @retval None
  876. */
  877. __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
  878. uint32_t BaudRate)
  879. {
  880. if (OverSampling == LL_USART_OVERSAMPLING_8)
  881. {
  882. USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
  883. }
  884. else
  885. {
  886. USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
  887. }
  888. }
  889. /**
  890. * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
  891. * (full BRR content), and to used Peripheral Clock and Oversampling mode values
  892. * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
  893. * @rmtoll BRR BRR LL_USART_GetBaudRate
  894. * @param USARTx USART Instance
  895. * @param PeriphClk Peripheral Clock
  896. * @param OverSampling This parameter can be one of the following values:
  897. * @arg @ref LL_USART_OVERSAMPLING_16
  898. * @arg @ref LL_USART_OVERSAMPLING_8
  899. * @retval Baud Rate
  900. */
  901. __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
  902. {
  903. register uint32_t usartdiv = 0x0U;
  904. register uint32_t brrresult = 0x0U;
  905. usartdiv = USARTx->BRR;
  906. if (OverSampling == LL_USART_OVERSAMPLING_8)
  907. {
  908. if ((usartdiv & 0xFFF7U) != 0U)
  909. {
  910. usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
  911. brrresult = (PeriphClk * 2U) / usartdiv;
  912. }
  913. }
  914. else
  915. {
  916. if ((usartdiv & 0xFFFFU) != 0U)
  917. {
  918. brrresult = PeriphClk / usartdiv;
  919. }
  920. }
  921. return (brrresult);
  922. }
  923. #else
  924. /**
  925. * @brief Configure USART BRR register for achieving expected Baud Rate value.
  926. * @note Compute and set USARTDIV value in BRR Register (full BRR content)
  927. * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
  928. * @note Peripheral clock and Baud rate values provided as function parameters should be valid
  929. * (Baud rate value != 0)
  930. * @rmtoll BRR BRR LL_USART_SetBaudRate
  931. * @param USARTx USART Instance
  932. * @param PeriphClk Peripheral Clock
  933. * @param BaudRate Baud Rate
  934. * @retval None
  935. */
  936. __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)
  937. {
  938. USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
  939. }
  940. /**
  941. * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
  942. * (full BRR content), and to used Peripheral Clock and Oversampling mode values
  943. * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
  944. * @rmtoll BRR BRR LL_USART_GetBaudRate
  945. * @param USARTx USART Instance
  946. * @param PeriphClk Peripheral Clock
  947. * @retval Baud Rate
  948. */
  949. __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk)
  950. {
  951. register uint32_t usartdiv = 0x0U;
  952. register uint32_t brrresult = 0x0U;
  953. usartdiv = USARTx->BRR;
  954. if ((usartdiv & 0xFFFFU) != 0U)
  955. {
  956. brrresult = PeriphClk / usartdiv;
  957. }
  958. return (brrresult);
  959. }
  960. #endif /* USART_OverSampling_Feature */
  961. /**
  962. * @}
  963. */
  964. /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
  965. * @{
  966. */
  967. /**
  968. * @brief Enable Single Wire Half-Duplex mode
  969. * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
  970. * Half-Duplex mode is supported by the USARTx instance.
  971. * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
  972. * @param USARTx USART Instance
  973. * @retval None
  974. */
  975. __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
  976. {
  977. SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
  978. }
  979. /**
  980. * @brief Disable Single Wire Half-Duplex mode
  981. * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
  982. * Half-Duplex mode is supported by the USARTx instance.
  983. * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
  984. * @param USARTx USART Instance
  985. * @retval None
  986. */
  987. __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
  988. {
  989. CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
  990. }
  991. /**
  992. * @brief Indicate if Single Wire Half-Duplex mode is enabled
  993. * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
  994. * Half-Duplex mode is supported by the USARTx instance.
  995. * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
  996. * @param USARTx USART Instance
  997. * @retval State of bit (1 or 0).
  998. */
  999. __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
  1000. {
  1001. return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
  1002. }
  1003. /**
  1004. * @}
  1005. */
  1006. /** @defgroup USART_LL_EF_Advanced_Configuration Advanced Configurations services
  1007. * @{
  1008. */
  1009. /**
  1010. * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
  1011. * @note In UART mode, the following bits must be kept cleared:
  1012. * - CLKEN bit in the USART_CR2 register,
  1013. * - HDSEL bit in the USART_CR3 register.
  1014. * @note Call of this function is equivalent to following function call sequence :
  1015. * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
  1016. * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
  1017. * @note Other remaining configurations items related to Asynchronous Mode
  1018. * (as Baud Rate, Word length, Parity, ...) should be set using
  1019. * dedicated functions
  1020. * @rmtoll CR2 CLKEN LL_USART_ConfigAsyncMode\n
  1021. * CR3 HDSEL LL_USART_ConfigAsyncMode
  1022. * @param USARTx USART Instance
  1023. * @retval None
  1024. */
  1025. __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
  1026. {
  1027. /* In Asynchronous mode, the following bits must be kept cleared:
  1028. - CLKEN bits in the USART_CR2 register,
  1029. - HDSEL bits in the USART_CR3 register.*/
  1030. CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
  1031. CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
  1032. }
  1033. /**
  1034. * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
  1035. * @note In Synchronous mode, the following bits must be kept cleared:
  1036. * - HDSEL bit in the USART_CR3 register.
  1037. * This function also sets the USART in Synchronous mode.
  1038. * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
  1039. * Synchronous mode is supported by the USARTx instance.
  1040. * @note Call of this function is equivalent to following function call sequence :
  1041. * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
  1042. * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
  1043. * @note Other remaining configurations items related to Synchronous Mode
  1044. * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
  1045. * dedicated functions
  1046. * @rmtoll CR2 CLKEN LL_USART_ConfigSyncMode\n
  1047. * CR3 HDSEL LL_USART_ConfigSyncMode
  1048. * @param USARTx USART Instance
  1049. * @retval None
  1050. */
  1051. __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
  1052. {
  1053. /* In Synchronous mode, the following bits must be kept cleared:
  1054. - HDSEL bits in the USART_CR3 register.*/
  1055. CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
  1056. /* set the UART/USART in Synchronous mode */
  1057. SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
  1058. }
  1059. /**
  1060. * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
  1061. * @note In Half Duplex mode, the following bits must be kept cleared:
  1062. * - CLKEN bit in the USART_CR2 register,
  1063. * This function also sets the UART/USART in Half Duplex mode.
  1064. * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
  1065. * Half-Duplex mode is supported by the USARTx instance.
  1066. * @note Call of this function is equivalent to following function call sequence :
  1067. * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
  1068. * @note Other remaining configurations items related to Half Duplex Mode
  1069. * (as Baud Rate, Word length, Parity, ...) should be set using
  1070. * dedicated functions
  1071. * @rmtoll CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
  1072. * CR3 HDSEL LL_USART_ConfigHalfDuplexMode
  1073. * @param USARTx USART Instance
  1074. * @retval None
  1075. */
  1076. __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
  1077. {
  1078. /* In Half Duplex mode, the following bits must be kept cleared:
  1079. - CLKEN bits in the USART_CR2 register */
  1080. CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
  1081. /* set the UART/USART in Half Duplex mode */
  1082. SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
  1083. }
  1084. /**
  1085. * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
  1086. * (several USARTs connected in a network, one of the USARTs can be the master,
  1087. * its TX output connected to the RX inputs of the other slaves USARTs).
  1088. * @note In MultiProcessor mode, the following bits must be kept cleared:
  1089. * - CLKEN bit in the USART_CR2 register,
  1090. * - HDSEL bit in the USART_CR3 register.
  1091. * @note Call of this function is equivalent to following function call sequence :
  1092. * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
  1093. * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
  1094. * @note Other remaining configurations items related to Multi processor Mode
  1095. * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
  1096. * dedicated functions
  1097. * @rmtoll CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
  1098. * CR3 HDSEL LL_USART_ConfigMultiProcessMode
  1099. * @param USARTx USART Instance
  1100. * @retval None
  1101. */
  1102. __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
  1103. {
  1104. /* In Multi Processor mode, the following bits must be kept cleared:
  1105. - CLKEN bits in the USART_CR2 register,
  1106. - HDSEL bits in the USART_CR3 register.*/
  1107. CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
  1108. CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
  1109. }
  1110. /**
  1111. * @}
  1112. */
  1113. /** @defgroup USART_LL_EF_FLAG_Management FLAG Management
  1114. * @{
  1115. */
  1116. /**
  1117. * @brief Check if the USART Parity Error Flag is set or not
  1118. * @rmtoll SR PE LL_USART_IsActiveFlag_PE
  1119. * @param USARTx USART Instance
  1120. * @retval State of bit (1 or 0).
  1121. */
  1122. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
  1123. {
  1124. return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
  1125. }
  1126. /**
  1127. * @brief Check if the USART Framing Error Flag is set or not
  1128. * @rmtoll SR FE LL_USART_IsActiveFlag_FE
  1129. * @param USARTx USART Instance
  1130. * @retval State of bit (1 or 0).
  1131. */
  1132. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
  1133. {
  1134. return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
  1135. }
  1136. /**
  1137. * @brief Check if the USART Noise error detected Flag is set or not
  1138. * @rmtoll SR NF LL_USART_IsActiveFlag_NE
  1139. * @param USARTx USART Instance
  1140. * @retval State of bit (1 or 0).
  1141. */
  1142. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
  1143. {
  1144. return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
  1145. }
  1146. /**
  1147. * @brief Check if the USART OverRun Error Flag is set or not
  1148. * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
  1149. * @param USARTx USART Instance
  1150. * @retval State of bit (1 or 0).
  1151. */
  1152. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
  1153. {
  1154. return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
  1155. }
  1156. /**
  1157. * @brief Check if the USART IDLE line detected Flag is set or not
  1158. * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
  1159. * @param USARTx USART Instance
  1160. * @retval State of bit (1 or 0).
  1161. */
  1162. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
  1163. {
  1164. return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
  1165. }
  1166. /**
  1167. * @brief Check if the USART Read Data Register Not Empty Flag is set or not
  1168. * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
  1169. * @param USARTx USART Instance
  1170. * @retval State of bit (1 or 0).
  1171. */
  1172. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
  1173. {
  1174. return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
  1175. }
  1176. /**
  1177. * @brief Check if the USART Transmission Complete Flag is set or not
  1178. * @rmtoll SR TC LL_USART_IsActiveFlag_TC
  1179. * @param USARTx USART Instance
  1180. * @retval State of bit (1 or 0).
  1181. */
  1182. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
  1183. {
  1184. return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
  1185. }
  1186. /**
  1187. * @brief Check if the USART Transmit Data Register Empty Flag is set or not
  1188. * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
  1189. * @param USARTx USART Instance
  1190. * @retval State of bit (1 or 0).
  1191. */
  1192. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
  1193. {
  1194. return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
  1195. }
  1196. /**
  1197. * @brief Check if the USART CTS Flag is set or not
  1198. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  1199. * Hardware Flow control feature is supported by the USARTx instance.
  1200. * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
  1201. * @param USARTx USART Instance
  1202. * @retval State of bit (1 or 0).
  1203. */
  1204. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
  1205. {
  1206. return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
  1207. }
  1208. /**
  1209. * @brief Check if the USART ABRF Flag is set or not
  1210. * @param USARTx USART Instance
  1211. * @retval State of bit (1 or 0).
  1212. */
  1213. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRF(USART_TypeDef *USARTx)
  1214. {
  1215. return (READ_BIT(USARTx->SR, USART_SR_ABRF) == (USART_SR_ABRF));
  1216. }
  1217. /**
  1218. * @brief Check if the USART ABRE Flag is set or not
  1219. * @param USARTx USART Instance
  1220. * @retval State of bit (1 or 0).
  1221. */
  1222. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(USART_TypeDef *USARTx)
  1223. {
  1224. return (READ_BIT(USARTx->SR, USART_SR_ABRE) == (USART_SR_ABRE));
  1225. }
  1226. /**
  1227. * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
  1228. * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
  1229. * @param USARTx USART Instance
  1230. * @retval State of bit (1 or 0).
  1231. */
  1232. __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
  1233. {
  1234. return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
  1235. }
  1236. /**
  1237. * @brief Clear Parity Error Flag
  1238. * @note Clearing this flag is done by a read access to the USARTx_SR
  1239. * register followed by a read access to the USARTx_DR register.
  1240. * @note Please also consider that when clearing this flag, other flags as
  1241. * NE, FE, ORE, IDLE would also be cleared.
  1242. * @rmtoll SR PE LL_USART_ClearFlag_PE
  1243. * @param USARTx USART Instance
  1244. * @retval None
  1245. */
  1246. __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
  1247. {
  1248. __IO uint32_t tmpreg;
  1249. tmpreg = USARTx->SR;
  1250. (void) tmpreg;
  1251. tmpreg = USARTx->DR;
  1252. (void) tmpreg;
  1253. }
  1254. /**
  1255. * @brief Clear Framing Error Flag
  1256. * @note Clearing this flag is done by a read access to the USARTx_SR
  1257. * register followed by a read access to the USARTx_DR register.
  1258. * @note Please also consider that when clearing this flag, other flags as
  1259. * PE, NE, ORE, IDLE would also be cleared.
  1260. * @rmtoll SR FE LL_USART_ClearFlag_FE
  1261. * @param USARTx USART Instance
  1262. * @retval None
  1263. */
  1264. __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
  1265. {
  1266. __IO uint32_t tmpreg;
  1267. tmpreg = USARTx->SR;
  1268. (void) tmpreg;
  1269. tmpreg = USARTx->DR;
  1270. (void) tmpreg;
  1271. }
  1272. /**
  1273. * @brief Clear Noise detected Flag
  1274. * @note Clearing this flag is done by a read access to the USARTx_SR
  1275. * register followed by a read access to the USARTx_DR register.
  1276. * @note Please also consider that when clearing this flag, other flags as
  1277. * PE, FE, ORE, IDLE would also be cleared.
  1278. * @rmtoll SR NF LL_USART_ClearFlag_NE
  1279. * @param USARTx USART Instance
  1280. * @retval None
  1281. */
  1282. __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
  1283. {
  1284. __IO uint32_t tmpreg;
  1285. tmpreg = USARTx->SR;
  1286. (void) tmpreg;
  1287. tmpreg = USARTx->DR;
  1288. (void) tmpreg;
  1289. }
  1290. /**
  1291. * @brief Clear OverRun Error Flag
  1292. * @note Clearing this flag is done by a read access to the USARTx_SR
  1293. * register followed by a read access to the USARTx_DR register.
  1294. * @note Please also consider that when clearing this flag, other flags as
  1295. * PE, NE, FE, IDLE would also be cleared.
  1296. * @rmtoll SR ORE LL_USART_ClearFlag_ORE
  1297. * @param USARTx USART Instance
  1298. * @retval None
  1299. */
  1300. __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
  1301. {
  1302. __IO uint32_t tmpreg;
  1303. tmpreg = USARTx->SR;
  1304. (void) tmpreg;
  1305. tmpreg = USARTx->DR;
  1306. (void) tmpreg;
  1307. }
  1308. /**
  1309. * @brief Clear IDLE line detected Flag
  1310. * @note Clearing this flag is done by a read access to the USARTx_SR
  1311. * register followed by a read access to the USARTx_DR register.
  1312. * @note Please also consider that when clearing this flag, other flags as
  1313. * PE, NE, FE, ORE would also be cleared.
  1314. * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
  1315. * @param USARTx USART Instance
  1316. * @retval None
  1317. */
  1318. __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
  1319. {
  1320. __IO uint32_t tmpreg;
  1321. tmpreg = USARTx->SR;
  1322. (void) tmpreg;
  1323. tmpreg = USARTx->DR;
  1324. (void) tmpreg;
  1325. }
  1326. /**
  1327. * @brief Clear Transmission Complete Flag
  1328. * @rmtoll SR TC LL_USART_ClearFlag_TC
  1329. * @param USARTx USART Instance
  1330. * @retval None
  1331. */
  1332. __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
  1333. {
  1334. WRITE_REG(USARTx->SR, ~(USART_SR_TC));
  1335. }
  1336. /**
  1337. * @brief Clear RX Not Empty Flag
  1338. * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
  1339. * @param USARTx USART Instance
  1340. * @retval None
  1341. */
  1342. __STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
  1343. {
  1344. WRITE_REG(USARTx->SR, ~(USART_SR_RXNE));
  1345. }
  1346. /**
  1347. * @brief Clear CTS Interrupt Flag
  1348. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  1349. * Hardware Flow control feature is supported by the USARTx instance.
  1350. * @rmtoll SR CTS LL_USART_ClearFlag_nCTS
  1351. * @param USARTx USART Instance
  1352. * @retval None
  1353. */
  1354. __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
  1355. {
  1356. WRITE_REG(USARTx->SR, ~(USART_SR_CTS));
  1357. }
  1358. /**
  1359. * @}
  1360. */
  1361. /** @defgroup USART_LL_EF_IT_Management IT Management
  1362. * @{
  1363. */
  1364. /**
  1365. * @brief Enable IDLE Interrupt
  1366. * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
  1367. * @param USARTx USART Instance
  1368. * @retval None
  1369. */
  1370. __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
  1371. {
  1372. SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
  1373. }
  1374. /**
  1375. * @brief Enable RX Not Empty Interrupt
  1376. * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
  1377. * @param USARTx USART Instance
  1378. * @retval None
  1379. */
  1380. __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
  1381. {
  1382. SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
  1383. }
  1384. /**
  1385. * @brief Enable Transmission Complete Interrupt
  1386. * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
  1387. * @param USARTx USART Instance
  1388. * @retval None
  1389. */
  1390. __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
  1391. {
  1392. SET_BIT(USARTx->CR1, USART_CR1_TCIE);
  1393. }
  1394. /**
  1395. * @brief Enable TX Empty Interrupt
  1396. * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
  1397. * @param USARTx USART Instance
  1398. * @retval None
  1399. */
  1400. __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
  1401. {
  1402. SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
  1403. }
  1404. /**
  1405. * @brief Enable Parity Error Interrupt
  1406. * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
  1407. * @param USARTx USART Instance
  1408. * @retval None
  1409. */
  1410. __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
  1411. {
  1412. SET_BIT(USARTx->CR1, USART_CR1_PEIE);
  1413. }
  1414. /**
  1415. * @brief Enable Error Interrupt
  1416. * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
  1417. * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
  1418. * 0: Interrupt is inhibited
  1419. * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
  1420. * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
  1421. * @param USARTx USART Instance
  1422. * @retval None
  1423. */
  1424. __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
  1425. {
  1426. SET_BIT(USARTx->CR3, USART_CR3_EIE);
  1427. }
  1428. /**
  1429. * @brief Enable CTS Interrupt
  1430. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  1431. * Hardware Flow control feature is supported by the USARTx instance.
  1432. * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
  1433. * @param USARTx USART Instance
  1434. * @retval None
  1435. */
  1436. __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
  1437. {
  1438. SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
  1439. }
  1440. /**
  1441. * @brief Disable IDLE Interrupt
  1442. * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
  1443. * @param USARTx USART Instance
  1444. * @retval None
  1445. */
  1446. __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
  1447. {
  1448. CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
  1449. }
  1450. /**
  1451. * @brief Disable RX Not Empty Interrupt
  1452. * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
  1453. * @param USARTx USART Instance
  1454. * @retval None
  1455. */
  1456. __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
  1457. {
  1458. CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
  1459. }
  1460. /**
  1461. * @brief Disable Transmission Complete Interrupt
  1462. * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
  1463. * @param USARTx USART Instance
  1464. * @retval None
  1465. */
  1466. __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
  1467. {
  1468. CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
  1469. }
  1470. /**
  1471. * @brief Disable TX Empty Interrupt
  1472. * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
  1473. * @param USARTx USART Instance
  1474. * @retval None
  1475. */
  1476. __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
  1477. {
  1478. CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
  1479. }
  1480. /**
  1481. * @brief Disable Parity Error Interrupt
  1482. * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
  1483. * @param USARTx USART Instance
  1484. * @retval None
  1485. */
  1486. __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
  1487. {
  1488. CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
  1489. }
  1490. /**
  1491. * @brief Disable Error Interrupt
  1492. * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
  1493. * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
  1494. * 0: Interrupt is inhibited
  1495. * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
  1496. * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
  1497. * @param USARTx USART Instance
  1498. * @retval None
  1499. */
  1500. __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
  1501. {
  1502. CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
  1503. }
  1504. /**
  1505. * @brief Disable CTS Interrupt
  1506. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  1507. * Hardware Flow control feature is supported by the USARTx instance.
  1508. * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
  1509. * @param USARTx USART Instance
  1510. * @retval None
  1511. */
  1512. __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
  1513. {
  1514. CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
  1515. }
  1516. /**
  1517. * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
  1518. * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
  1519. * @param USARTx USART Instance
  1520. * @retval State of bit (1 or 0).
  1521. */
  1522. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
  1523. {
  1524. return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
  1525. }
  1526. /**
  1527. * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
  1528. * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
  1529. * @param USARTx USART Instance
  1530. * @retval State of bit (1 or 0).
  1531. */
  1532. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
  1533. {
  1534. return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
  1535. }
  1536. /**
  1537. * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
  1538. * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
  1539. * @param USARTx USART Instance
  1540. * @retval State of bit (1 or 0).
  1541. */
  1542. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
  1543. {
  1544. return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
  1545. }
  1546. /**
  1547. * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
  1548. * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
  1549. * @param USARTx USART Instance
  1550. * @retval State of bit (1 or 0).
  1551. */
  1552. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
  1553. {
  1554. return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
  1555. }
  1556. /**
  1557. * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
  1558. * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
  1559. * @param USARTx USART Instance
  1560. * @retval State of bit (1 or 0).
  1561. */
  1562. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
  1563. {
  1564. return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
  1565. }
  1566. /**
  1567. * @brief Check if the USART Error Interrupt is enabled or disabled.
  1568. * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
  1569. * @param USARTx USART Instance
  1570. * @retval State of bit (1 or 0).
  1571. */
  1572. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
  1573. {
  1574. return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
  1575. }
  1576. /**
  1577. * @brief Check if the USART CTS Interrupt is enabled or disabled.
  1578. * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
  1579. * Hardware Flow control feature is supported by the USARTx instance.
  1580. * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
  1581. * @param USARTx USART Instance
  1582. * @retval State of bit (1 or 0).
  1583. */
  1584. __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
  1585. {
  1586. return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
  1587. }
  1588. /**
  1589. * @}
  1590. */
  1591. /** @defgroup USART_LL_EF_Data_Management Data_Management
  1592. * @{
  1593. */
  1594. /**
  1595. * @brief Read Receiver Data register (Receive Data value, 8 bits)
  1596. * @rmtoll DR DR LL_USART_ReceiveData8
  1597. * @param USARTx USART Instance
  1598. * @retval Value between Min_Data=0x00 and Max_Data=0xFF
  1599. */
  1600. __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
  1601. {
  1602. return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
  1603. }
  1604. /**
  1605. * @brief Read Receiver Data register (Receive Data value, 9 bits)
  1606. * @rmtoll DR DR LL_USART_ReceiveData9
  1607. * @param USARTx USART Instance
  1608. * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
  1609. */
  1610. __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
  1611. {
  1612. return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
  1613. }
  1614. /**
  1615. * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
  1616. * @rmtoll DR DR LL_USART_TransmitData8
  1617. * @param USARTx USART Instance
  1618. * @param Value between Min_Data=0x00 and Max_Data=0xFF
  1619. * @retval None
  1620. */
  1621. __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
  1622. {
  1623. USARTx->DR = Value;
  1624. }
  1625. /**
  1626. * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
  1627. * @rmtoll DR DR LL_USART_TransmitData9
  1628. * @param USARTx USART Instance
  1629. * @param Value between Min_Data=0x00 and Max_Data=0x1FF
  1630. * @retval None
  1631. */
  1632. __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
  1633. {
  1634. USARTx->DR = Value & 0x1FFU;
  1635. }
  1636. /**
  1637. * @}
  1638. */
  1639. /** @defgroup USART_LL_EF_Execution Execution
  1640. * @{
  1641. */
  1642. /**
  1643. * @brief Put USART in Mute mode
  1644. * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
  1645. * @param USARTx USART Instance
  1646. * @retval None
  1647. */
  1648. __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
  1649. {
  1650. SET_BIT(USARTx->CR1, USART_CR1_RWU);
  1651. }
  1652. /**
  1653. * @brief Put USART in Active mode
  1654. * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
  1655. * @param USARTx USART Instance
  1656. * @retval None
  1657. */
  1658. __STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
  1659. {
  1660. CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
  1661. }
  1662. /**
  1663. * @brief Enable automatic baud rate detection
  1664. * @param USARTx USART Instance
  1665. * @retval None
  1666. */
  1667. __STATIC_INLINE void LL_USART_EnableAutoBaudRate(USART_TypeDef *USARTx)
  1668. {
  1669. SET_BIT(USARTx->CR3, USART_CR3_ABREN);
  1670. }
  1671. /**
  1672. * @brief Disable automatic baud rate detection
  1673. * @param USARTx USART Instance
  1674. * @retval None
  1675. */
  1676. __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx)
  1677. {
  1678. CLEAR_BIT(USARTx->CR3, USART_CR3_ABREN);
  1679. }
  1680. /**
  1681. * @brief Indicate if enable automatic baud rate detection
  1682. * @param USARTx USART Instance
  1683. * @retval State of bit (1 or 0).
  1684. */
  1685. __STATIC_INLINE uint32_t LL_USART_IsEnabledAutoBaudRate(USART_TypeDef *USARTx)
  1686. {
  1687. return (READ_BIT(USARTx->CR3, USART_CR3_ABREN) == (USART_CR3_ABREN));
  1688. }
  1689. /**
  1690. * @brief Set auto baud rate detection mode
  1691. * @param USARTx USART Instance
  1692. * @param mode This parameter can be one of the following values:
  1693. * @arg @ref LL_USART_AUTOBAUDRATE_ONSTARTBIT
  1694. * @arg @ref LL_USART_AUTOBAUDRATE_ONFALLINGEDGE
  1695. * @retval None
  1696. */
  1697. __STATIC_INLINE void LL_USART_SetAutoBaudRateMode(USART_TypeDef *USARTx, uint32_t mode)
  1698. {
  1699. MODIFY_REG(USARTx->CR3, USART_CR3_ABRMODE, mode);
  1700. }
  1701. /**
  1702. * @brief Get auto baud rate detection mode
  1703. * @param USARTx USART Instance
  1704. * @retval Returned value can be one of the following values:
  1705. * @arg @ref LL_USART_AUTOBAUDRATE_ONSTARTBIT
  1706. * @arg @ref LL_USART_AUTOBAUDRATE_ONFALLINGEDGE
  1707. */
  1708. __STATIC_INLINE uint32_t LL_USART_GetAutoBaudRateMode(USART_TypeDef *USARTx)
  1709. {
  1710. return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_ABRMODE));
  1711. }
  1712. /**
  1713. * @brief Request automatic baud rate detection
  1714. * @param USARTx USART Instance
  1715. * @retval None
  1716. */
  1717. __STATIC_INLINE void LL_USART_SendAutoBaudRateReq(USART_TypeDef *USARTx)
  1718. {
  1719. SET_BIT(USARTx->SR, USART_SR_ABRRQ);
  1720. }
  1721. /**
  1722. * @}
  1723. */
  1724. #if defined(USE_FULL_LL_DRIVER)
  1725. /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
  1726. * @{
  1727. */
  1728. ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
  1729. ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
  1730. void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
  1731. ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
  1732. void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
  1733. /**
  1734. * @}
  1735. */
  1736. #endif /* USE_FULL_LL_DRIVER */
  1737. /**
  1738. * @}
  1739. */
  1740. /**
  1741. * @}
  1742. */
  1743. #endif /* USART1 */
  1744. /**
  1745. * @}
  1746. */
  1747. #ifdef __cplusplus
  1748. }
  1749. #endif
  1750. #endif /* __PY32F002B_LL_USART_H */
  1751. /************************ (C) COPYRIGHT Puya *****END OF FILE****/