py32f002b_hal_i2c.c 164 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f002b_hal_i2c.c
  4. * @author MCU Application Team
  5. * @brief I2C HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State, Mode and Error functions
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### How to use this driver #####
  15. ==============================================================================
  16. [..]
  17. The I2C HAL driver can be used as follows:
  18. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  19. I2C_HandleTypeDef hi2c;
  20. (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API:
  21. (##) Enable the I2Cx interface clock
  22. (##) I2C pins configuration
  23. (+++) Enable the clock for the I2C GPIOs
  24. (+++) Configure I2C pins as alternate function open-drain
  25. (##) NVIC configuration if you need to use interrupt process
  26. (+++) Configure the I2Cx interrupt priority
  27. (+++) Enable the NVIC I2C IRQ Channel
  28. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  29. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  30. (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low level Hardware
  31. (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit() API.
  32. (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDeviceReady()
  33. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  34. *** Polling mode IO operation ***
  35. =================================
  36. [..]
  37. (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Transmit()
  38. (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Receive()
  39. (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transmit()
  40. (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive()
  41. *** Polling mode IO MEM operation ***
  42. =====================================
  43. [..]
  44. (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_Mem_Write()
  45. (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C_Mem_Read()
  46. *** Interrupt mode IO operation ***
  47. ===================================
  48. [..]
  49. (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Transmit_IT()
  50. (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  51. add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  52. (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Receive_IT()
  53. (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  54. add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  55. (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Transmit_IT()
  56. (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  57. add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  58. (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Receive_IT()
  59. (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  60. add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  61. (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  62. add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  63. (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  64. (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  65. add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  66. *** Interrupt mode IO sequential operation ***
  67. ==========================================================
  68. [..]
  69. (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  70. when a direction change during transfer
  71. [..]
  72. (+) A specific option field manage the different steps of a sequential transfer
  73. (+) Option field values are defined through @ref I2C_XferOptions_definition and are listed below:
  74. (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  75. (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  76. and data to transfer without a final stop condition
  77. (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a sequence with start condition, address
  78. and data to transfer without a final stop condition, an then permit a call the same master sequential interface
  79. several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL_I2C_Master_Seq_Transmit_IT()
  80. (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  81. and with new data to transfer if the direction change or manage only the new data to transfer
  82. if no direction change and without a final stop condition in both cases
  83. (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  84. and with new data to transfer if the direction change or manage only the new data to transfer
  85. if no direction change and with a final stop condition in both cases
  86. (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a restart condition after several call of the same master sequential
  87. interface several times (link with option I2C_FIRST_AND_NEXT_FRAME).
  88. Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME)
  89. or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then I2C_NEXT_FRAME).
  90. Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit or Receive sequence permit to call the oposite interface Receive or Transmit
  91. without stopping the communication and so generate a restart condition.
  92. (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart condition after each call of the same master sequential
  93. interface.
  94. Usage can, transfer several bytes one by one with a restart with slave address between each bytes using HAL_I2C_Master_Seq_Transmit_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME)
  95. or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHER_FRAME).
  96. Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to help automatic generation of STOP condition.
  97. (+) Differents sequential I2C interfaces are listed below:
  98. (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Transmit_IT()
  99. (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user can
  100. add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback()
  101. (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_Seq_Receive_IT()
  102. (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user can
  103. add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback()
  104. (++) Abort a master IT with Interrupt using @ref HAL_I2C_Master_Abort_IT()
  105. (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can
  106. add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback()
  107. (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen_IT() @ref HAL_I2C_DisableListen_IT()
  108. (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can
  109. add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  110. (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can
  111. add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback()
  112. (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Transmit_IT()
  113. (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user can
  114. add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback()
  115. (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Seq_Receive_IT()
  116. (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can
  117. add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback()
  118. (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  119. add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  120. *** Interrupt mode IO MEM operation ***
  121. =======================================
  122. [..]
  123. (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address using
  124. @ref HAL_I2C_Mem_Write_IT()
  125. (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user can
  126. add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback()
  127. (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address using
  128. @ref HAL_I2C_Mem_Read_IT()
  129. (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can
  130. add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback()
  131. (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can
  132. add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback()
  133. *** I2C HAL driver macros list ***
  134. ==================================
  135. [..]
  136. Below the list of most used macros in I2C HAL driver.
  137. (+) @ref __HAL_I2C_ENABLE: Enable the I2C peripheral
  138. (+) @ref __HAL_I2C_DISABLE: Disable the I2C peripheral
  139. (+) @ref __HAL_I2C_GET_FLAG: Checks whether the specified I2C flag is set or not
  140. (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag
  141. (+) @ref __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  142. (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  143. *** Callback registration ***
  144. =============================================
  145. [..]
  146. The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1
  147. allows the user to configure dynamically the driver callbacks.
  148. Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback()
  149. to register an interrupt callback.
  150. [..]
  151. Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks:
  152. (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  153. (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  154. (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
  155. (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
  156. (+) ListenCpltCallback : callback for end of listen mode.
  157. (+) MemTxCpltCallback : callback for Memory transmission end of transfer.
  158. (+) MemRxCpltCallback : callback for Memory reception end of transfer.
  159. (+) ErrorCallback : callback for error detection.
  160. (+) AbortCpltCallback : callback for abort completion process.
  161. (+) MspInitCallback : callback for Msp Init.
  162. (+) MspDeInitCallback : callback for Msp DeInit.
  163. This function takes as parameters the HAL peripheral handle, the Callback ID
  164. and a pointer to the user callback function.
  165. [..]
  166. For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAddrCallback().
  167. [..]
  168. Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default
  169. weak function.
  170. @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle,
  171. and the Callback ID.
  172. This function allows to reset following callbacks:
  173. (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  174. (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  175. (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
  176. (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
  177. (+) ListenCpltCallback : callback for end of listen mode.
  178. (+) MemTxCpltCallback : callback for Memory transmission end of transfer.
  179. (+) MemRxCpltCallback : callback for Memory reception end of transfer.
  180. (+) ErrorCallback : callback for error detection.
  181. (+) AbortCpltCallback : callback for abort completion process.
  182. (+) MspInitCallback : callback for Msp Init.
  183. (+) MspDeInitCallback : callback for Msp DeInit.
  184. [..]
  185. For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallback().
  186. [..]
  187. By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET
  188. all callbacks are set to the corresponding weak functions:
  189. examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback().
  190. Exception done for MspInit and MspDeInit functions that are
  191. reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when
  192. these callbacks are null (not registered beforehand).
  193. If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit()
  194. keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  195. [..]
  196. Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only.
  197. Exception done MspInit/MspDeInit functions that can be registered/unregistered
  198. in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state,
  199. thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  200. Then, the user first registers the MspInit/MspDeInit user callbacks
  201. using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit()
  202. or @ref HAL_I2C_Init() function.
  203. [..]
  204. When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or
  205. not defined, the callback registration feature is not available and all callbacks
  206. are set to the corresponding weak functions.
  207. *** I2C Workarounds linked to Silicon Limitation ***
  208. ====================================================
  209. [..]
  210. Below the list of all silicon limitations implemented for HAL on PY32F002B product.
  211. (@) See ErrataSheet to know full silicon limitation list of your product.
  212. (+) Workarounds Implemented inside I2C HAL Driver
  213. (++) Wrong data read into data register (Polling and Interrupt mode)
  214. (++) Start cannot be generated after a misplaced Stop
  215. (++) Some software events must be managed before the current byte is being transferred:
  216. Workaround:For Interupt mode, I2C should have the highest priority in the application.
  217. (++) Mismatch on the "Setup time for a repeated Start condition" timing parameter:
  218. Workaround: Reduce the frequency down to 88 kHz or use the I2C Fast-mode if
  219. supported by the slave.
  220. (++) Data valid time (tVD;DAT) violated without the OVR flag being set:
  221. Workaround: If the slave device allows it, use the clock stretching mechanism
  222. by programming NoStretchMode = I2C_NOSTRETCH_DISABLE in @ref HAL_I2C_Init.
  223. [..]
  224. (@) You can refer to the I2C HAL driver header file for more useful macros
  225. @endverbatim
  226. ******************************************************************************
  227. * @attention
  228. *
  229. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  230. * All rights reserved.</center></h2>
  231. *
  232. * This software component is licensed by Puya under BSD 3-Clause license,
  233. * the "License"; You may not use this file except in compliance with the
  234. * License. You may obtain a copy of the License at:
  235. * opensource.org/licenses/BSD-3-Clause
  236. *
  237. ******************************************************************************
  238. * @attention
  239. *
  240. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  241. * All rights reserved.</center></h2>
  242. *
  243. * This software component is licensed by ST under BSD 3-Clause license,
  244. * the "License"; You may not use this file except in compliance with the
  245. * License. You may obtain a copy of the License at:
  246. * opensource.org/licenses/BSD-3-Clause
  247. *
  248. ******************************************************************************
  249. */
  250. /* Includes ------------------------------------------------------------------*/
  251. #include "py32f0xx_hal.h"
  252. #include "py32f002b_hal_i2c.h"
  253. /** @addtogroup PY32F002B_HAL_Driver
  254. * @{
  255. */
  256. /** @defgroup I2C I2C
  257. * @brief I2C HAL module driver
  258. * @{
  259. */
  260. #ifdef HAL_I2C_MODULE_ENABLED
  261. /* Private typedef -----------------------------------------------------------*/
  262. /* Private define ------------------------------------------------------------*/
  263. /** @addtogroup I2C_Private_Define I2C Private Define
  264. * @{
  265. */
  266. #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */
  267. #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */
  268. #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */
  269. #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */
  270. #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */
  271. #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */
  272. #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */
  273. #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */
  274. #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */
  275. #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */
  276. #define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
  277. #define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
  278. /* Private define for @ref PreviousState usage */
  279. #define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_t)HAL_I2C_STATE_BUSY_RX) & (uint32_t)(~((uint32_t)HAL_I2C_STATE_READY)))) /*!< Mask State define, keep only RX and TX bits */
  280. #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
  281. #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  282. #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  283. #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
  284. #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | (uint32_t)HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
  285. /**
  286. * @}
  287. */
  288. /* Private macro -------------------------------------------------------------*/
  289. /* Private variables ---------------------------------------------------------*/
  290. /* Private function prototypes -----------------------------------------------*/
  291. /** @defgroup I2C_Private_Functions I2C Private Functions
  292. * @{
  293. */
  294. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  295. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  296. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  297. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  298. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  299. /* Private functions to handle flags during polling transfer */
  300. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  301. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  302. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  303. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  304. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  305. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  306. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  307. /* Private functions for I2C transfer IRQ handler */
  308. static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  309. static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  310. static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  311. static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  312. static void I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  313. static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  314. static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  315. static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  316. static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  317. static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  318. static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  319. static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags);
  320. static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  321. static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  322. /* Private function to Convert Specific options */
  323. static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
  324. /**
  325. * @}
  326. */
  327. /* Exported functions --------------------------------------------------------*/
  328. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  329. * @{
  330. */
  331. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  332. * @brief Initialization and Configuration functions
  333. *
  334. @verbatim
  335. ===============================================================================
  336. ##### Initialization and de-initialization functions #####
  337. ===============================================================================
  338. [..] This subsection provides a set of functions allowing to initialize and
  339. deinitialize the I2Cx peripheral:
  340. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  341. all related peripherals resources (CLOCK, GPIO, IT and NVIC).
  342. (+) Call the function HAL_I2C_Init() to configure the selected device with
  343. the selected configuration:
  344. (++) Communication Speed
  345. (++) Duty cycle
  346. (++) Addressing mode
  347. (++) Own Address 1
  348. (++) Dual Addressing mode
  349. (++) Own Address 2
  350. (++) General call mode
  351. (++) Nostretch mode
  352. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  353. of the selected I2Cx peripheral.
  354. @endverbatim
  355. * @{
  356. */
  357. /**
  358. * @brief Initializes the I2C according to the specified parameters
  359. * in the I2C_InitTypeDef and initialize the associated handle.
  360. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  361. * the configuration information for the specified I2C.
  362. * @retval HAL status
  363. */
  364. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  365. {
  366. uint32_t freqrange;
  367. uint32_t pclk1;
  368. /* Check the I2C handle allocation */
  369. if (hi2c == NULL)
  370. {
  371. return HAL_ERROR;
  372. }
  373. /* Check the parameters */
  374. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  375. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  376. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  377. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  378. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  379. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  380. if (hi2c->State == HAL_I2C_STATE_RESET)
  381. {
  382. /* Allocate lock resource and initialize it */
  383. hi2c->Lock = HAL_UNLOCKED;
  384. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  385. /* Init the I2C Callback settings */
  386. hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  387. hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  388. hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
  389. hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
  390. hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
  391. hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback */
  392. hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback */
  393. hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback */
  394. hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
  395. hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */
  396. if (hi2c->MspInitCallback == NULL)
  397. {
  398. hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */
  399. }
  400. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  401. hi2c->MspInitCallback(hi2c);
  402. #else
  403. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  404. HAL_I2C_MspInit(hi2c);
  405. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  406. }
  407. hi2c->State = HAL_I2C_STATE_BUSY;
  408. /* Disable the selected I2C peripheral */
  409. __HAL_I2C_DISABLE(hi2c);
  410. /* Get PCLK1 frequency */
  411. pclk1 = HAL_RCC_GetPCLK1Freq();
  412. /* Check the minimum allowed PCLK1 frequency */
  413. if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
  414. {
  415. return HAL_ERROR;
  416. }
  417. /* Calculate frequency range */
  418. freqrange = I2C_FREQRANGE(pclk1);
  419. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  420. /* Configure I2Cx: Frequency range */
  421. MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
  422. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  423. /* Configure I2Cx: Rise Time */
  424. MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
  425. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  426. /* Configure I2Cx: Speed */
  427. MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
  428. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  429. /* Configure I2Cx: Generalcall and NoStretch mode */
  430. MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
  431. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  432. /* Configure I2Cx: Own Address1 and addressing mode */
  433. MODIFY_REG(hi2c->Instance->OAR1, ( I2C_OAR1_ADD1_7 ), (hi2c->Init.OwnAddress1));
  434. /* Enable the selected I2C peripheral */
  435. __HAL_I2C_ENABLE(hi2c);
  436. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  437. hi2c->State = HAL_I2C_STATE_READY;
  438. hi2c->PreviousState = I2C_STATE_NONE;
  439. hi2c->Mode = HAL_I2C_MODE_NONE;
  440. return HAL_OK;
  441. }
  442. /**
  443. * @brief DeInitialize the I2C peripheral.
  444. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  445. * the configuration information for the specified I2C.
  446. * @retval HAL status
  447. */
  448. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  449. {
  450. /* Check the I2C handle allocation */
  451. if (hi2c == NULL)
  452. {
  453. return HAL_ERROR;
  454. }
  455. /* Check the parameters */
  456. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  457. hi2c->State = HAL_I2C_STATE_BUSY;
  458. /* Disable the I2C Peripheral Clock */
  459. __HAL_I2C_DISABLE(hi2c);
  460. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  461. if (hi2c->MspDeInitCallback == NULL)
  462. {
  463. hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */
  464. }
  465. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  466. hi2c->MspDeInitCallback(hi2c);
  467. #else
  468. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  469. HAL_I2C_MspDeInit(hi2c);
  470. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  471. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  472. hi2c->State = HAL_I2C_STATE_RESET;
  473. hi2c->PreviousState = I2C_STATE_NONE;
  474. hi2c->Mode = HAL_I2C_MODE_NONE;
  475. /* Release Lock */
  476. __HAL_UNLOCK(hi2c);
  477. return HAL_OK;
  478. }
  479. /**
  480. * @brief Initialize the I2C MSP.
  481. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  482. * the configuration information for the specified I2C.
  483. * @retval None
  484. */
  485. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  486. {
  487. /* Prevent unused argument(s) compilation warning */
  488. UNUSED(hi2c);
  489. /* NOTE : This function should not be modified, when the callback is needed,
  490. the HAL_I2C_MspInit could be implemented in the user file
  491. */
  492. }
  493. /**
  494. * @brief DeInitialize the I2C MSP.
  495. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  496. * the configuration information for the specified I2C.
  497. * @retval None
  498. */
  499. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  500. {
  501. /* Prevent unused argument(s) compilation warning */
  502. UNUSED(hi2c);
  503. /* NOTE : This function should not be modified, when the callback is needed,
  504. the HAL_I2C_MspDeInit could be implemented in the user file
  505. */
  506. }
  507. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  508. /**
  509. * @brief Register a User I2C Callback
  510. * To be used instead of the weak predefined callback
  511. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  512. * the configuration information for the specified I2C.
  513. * @param CallbackID ID of the callback to be registered
  514. * This parameter can be one of the following values:
  515. * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  516. * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  517. * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  518. * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  519. * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  520. * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
  521. * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
  522. * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
  523. * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
  524. * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
  525. * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
  526. * @param pCallback pointer to the Callback function
  527. * @retval HAL status
  528. */
  529. HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, pI2C_CallbackTypeDef pCallback)
  530. {
  531. HAL_StatusTypeDef status = HAL_OK;
  532. if (pCallback == NULL)
  533. {
  534. /* Update the error code */
  535. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  536. return HAL_ERROR;
  537. }
  538. /* Process locked */
  539. __HAL_LOCK(hi2c);
  540. if (HAL_I2C_STATE_READY == hi2c->State)
  541. {
  542. switch (CallbackID)
  543. {
  544. case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
  545. hi2c->MasterTxCpltCallback = pCallback;
  546. break;
  547. case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
  548. hi2c->MasterRxCpltCallback = pCallback;
  549. break;
  550. case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
  551. hi2c->SlaveTxCpltCallback = pCallback;
  552. break;
  553. case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
  554. hi2c->SlaveRxCpltCallback = pCallback;
  555. break;
  556. case HAL_I2C_LISTEN_COMPLETE_CB_ID :
  557. hi2c->ListenCpltCallback = pCallback;
  558. break;
  559. case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
  560. hi2c->MemTxCpltCallback = pCallback;
  561. break;
  562. case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
  563. hi2c->MemRxCpltCallback = pCallback;
  564. break;
  565. case HAL_I2C_ERROR_CB_ID :
  566. hi2c->ErrorCallback = pCallback;
  567. break;
  568. case HAL_I2C_ABORT_CB_ID :
  569. hi2c->AbortCpltCallback = pCallback;
  570. break;
  571. case HAL_I2C_MSPINIT_CB_ID :
  572. hi2c->MspInitCallback = pCallback;
  573. break;
  574. case HAL_I2C_MSPDEINIT_CB_ID :
  575. hi2c->MspDeInitCallback = pCallback;
  576. break;
  577. default :
  578. /* Update the error code */
  579. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  580. /* Return error status */
  581. status = HAL_ERROR;
  582. break;
  583. }
  584. }
  585. else if (HAL_I2C_STATE_RESET == hi2c->State)
  586. {
  587. switch (CallbackID)
  588. {
  589. case HAL_I2C_MSPINIT_CB_ID :
  590. hi2c->MspInitCallback = pCallback;
  591. break;
  592. case HAL_I2C_MSPDEINIT_CB_ID :
  593. hi2c->MspDeInitCallback = pCallback;
  594. break;
  595. default :
  596. /* Update the error code */
  597. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  598. /* Return error status */
  599. status = HAL_ERROR;
  600. break;
  601. }
  602. }
  603. else
  604. {
  605. /* Update the error code */
  606. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  607. /* Return error status */
  608. status = HAL_ERROR;
  609. }
  610. /* Release Lock */
  611. __HAL_UNLOCK(hi2c);
  612. return status;
  613. }
  614. /**
  615. * @brief Unregister an I2C Callback
  616. * I2C callback is redirected to the weak predefined callback
  617. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  618. * the configuration information for the specified I2C.
  619. * @param CallbackID ID of the callback to be unregistered
  620. * This parameter can be one of the following values:
  621. * This parameter can be one of the following values:
  622. * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  623. * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  624. * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  625. * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  626. * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  627. * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID
  628. * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID
  629. * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID
  630. * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID
  631. * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID
  632. * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID
  633. * @retval HAL status
  634. */
  635. HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID)
  636. {
  637. HAL_StatusTypeDef status = HAL_OK;
  638. /* Process locked */
  639. __HAL_LOCK(hi2c);
  640. if (HAL_I2C_STATE_READY == hi2c->State)
  641. {
  642. switch (CallbackID)
  643. {
  644. case HAL_I2C_MASTER_TX_COMPLETE_CB_ID :
  645. hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  646. break;
  647. case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
  648. hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  649. break;
  650. case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
  651. hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
  652. break;
  653. case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID :
  654. hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
  655. break;
  656. case HAL_I2C_LISTEN_COMPLETE_CB_ID :
  657. hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
  658. break;
  659. case HAL_I2C_MEM_TX_COMPLETE_CB_ID :
  660. hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback */
  661. break;
  662. case HAL_I2C_MEM_RX_COMPLETE_CB_ID :
  663. hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback */
  664. break;
  665. case HAL_I2C_ERROR_CB_ID :
  666. hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback */
  667. break;
  668. case HAL_I2C_ABORT_CB_ID :
  669. hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
  670. break;
  671. case HAL_I2C_MSPINIT_CB_ID :
  672. hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */
  673. break;
  674. case HAL_I2C_MSPDEINIT_CB_ID :
  675. hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */
  676. break;
  677. default :
  678. /* Update the error code */
  679. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  680. /* Return error status */
  681. status = HAL_ERROR;
  682. break;
  683. }
  684. }
  685. else if (HAL_I2C_STATE_RESET == hi2c->State)
  686. {
  687. switch (CallbackID)
  688. {
  689. case HAL_I2C_MSPINIT_CB_ID :
  690. hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */
  691. break;
  692. case HAL_I2C_MSPDEINIT_CB_ID :
  693. hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */
  694. break;
  695. default :
  696. /* Update the error code */
  697. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  698. /* Return error status */
  699. status = HAL_ERROR;
  700. break;
  701. }
  702. }
  703. else
  704. {
  705. /* Update the error code */
  706. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  707. /* Return error status */
  708. status = HAL_ERROR;
  709. }
  710. /* Release Lock */
  711. __HAL_UNLOCK(hi2c);
  712. return status;
  713. }
  714. /**
  715. * @brief Register the Slave Address Match I2C Callback
  716. * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback
  717. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  718. * the configuration information for the specified I2C.
  719. * @param pCallback pointer to the Address Match Callback function
  720. * @retval HAL status
  721. */
  722. HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback)
  723. {
  724. HAL_StatusTypeDef status = HAL_OK;
  725. if (pCallback == NULL)
  726. {
  727. /* Update the error code */
  728. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  729. return HAL_ERROR;
  730. }
  731. /* Process locked */
  732. __HAL_LOCK(hi2c);
  733. if (HAL_I2C_STATE_READY == hi2c->State)
  734. {
  735. hi2c->AddrCallback = pCallback;
  736. }
  737. else
  738. {
  739. /* Update the error code */
  740. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  741. /* Return error status */
  742. status = HAL_ERROR;
  743. }
  744. /* Release Lock */
  745. __HAL_UNLOCK(hi2c);
  746. return status;
  747. }
  748. /**
  749. * @brief UnRegister the Slave Address Match I2C Callback
  750. * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined callback
  751. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  752. * the configuration information for the specified I2C.
  753. * @retval HAL status
  754. */
  755. HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c)
  756. {
  757. HAL_StatusTypeDef status = HAL_OK;
  758. /* Process locked */
  759. __HAL_LOCK(hi2c);
  760. if (HAL_I2C_STATE_READY == hi2c->State)
  761. {
  762. hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */
  763. }
  764. else
  765. {
  766. /* Update the error code */
  767. hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
  768. /* Return error status */
  769. status = HAL_ERROR;
  770. }
  771. /* Release Lock */
  772. __HAL_UNLOCK(hi2c);
  773. return status;
  774. }
  775. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  776. /**
  777. * @}
  778. */
  779. /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions
  780. * @brief Data transfers functions
  781. *
  782. @verbatim
  783. ===============================================================================
  784. ##### IO operation functions #####
  785. ===============================================================================
  786. [..]
  787. This subsection provides a set of functions allowing to manage the I2C data
  788. transfers.
  789. (#) There are two modes of transfer:
  790. (++) Blocking mode : The communication is performed in the polling mode.
  791. The status of all data processing is returned by the same function
  792. after finishing transfer.
  793. (++) No-Blocking mode : The communication is performed using Interrupts.
  794. These functions return the status of the transfer startup.
  795. The end of the data processing will be indicated through the
  796. dedicated I2C IRQ when using Interrupt mode.
  797. (#) Blocking mode functions are :
  798. (++) HAL_I2C_Master_Transmit()
  799. (++) HAL_I2C_Master_Receive()
  800. (++) HAL_I2C_Slave_Transmit()
  801. (++) HAL_I2C_Slave_Receive()
  802. (++) HAL_I2C_Mem_Write()
  803. (++) HAL_I2C_Mem_Read()
  804. (++) HAL_I2C_IsDeviceReady()
  805. (#) No-Blocking mode functions with Interrupt are :
  806. (++) HAL_I2C_Master_Transmit_IT()
  807. (++) HAL_I2C_Master_Receive_IT()
  808. (++) HAL_I2C_Slave_Transmit_IT()
  809. (++) HAL_I2C_Slave_Receive_IT()
  810. (++) HAL_I2C_Mem_Write_IT()
  811. (++) HAL_I2C_Mem_Read_IT()
  812. (++) HAL_I2C_Master_Seq_Transmit_IT()
  813. (++) HAL_I2C_Master_Seq_Receive_IT()
  814. (++) HAL_I2C_Slave_Seq_Transmit_IT()
  815. (++) HAL_I2C_Slave_Seq_Receive_IT()
  816. (++) HAL_I2C_EnableListen_IT()
  817. (++) HAL_I2C_DisableListen_IT()
  818. (++) HAL_I2C_Master_Abort_IT()
  819. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  820. (++) HAL_I2C_MasterTxCpltCallback()
  821. (++) HAL_I2C_MasterRxCpltCallback()
  822. (++) HAL_I2C_SlaveTxCpltCallback()
  823. (++) HAL_I2C_SlaveRxCpltCallback()
  824. (++) HAL_I2C_MemTxCpltCallback()
  825. (++) HAL_I2C_MemRxCpltCallback()
  826. (++) HAL_I2C_AddrCallback()
  827. (++) HAL_I2C_ListenCpltCallback()
  828. (++) HAL_I2C_ErrorCallback()
  829. (++) HAL_I2C_AbortCpltCallback()
  830. @endverbatim
  831. * @{
  832. */
  833. /**
  834. * @brief Transmits in master mode an amount of data in blocking mode.
  835. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  836. * the configuration information for the specified I2C.
  837. * @param DevAddress Target device address: The device 7 bits address value
  838. * in datasheet must be shifted to the left before calling the interface
  839. * @param pData Pointer to data buffer
  840. * @param Size Amount of data to be sent
  841. * @param Timeout Timeout duration
  842. * @retval HAL status
  843. */
  844. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  845. {
  846. /* Init tickstart for timeout management*/
  847. uint32_t tickstart = HAL_GetTick();
  848. if (hi2c->State == HAL_I2C_STATE_READY)
  849. {
  850. /* Wait until BUSY flag is reset */
  851. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  852. {
  853. return HAL_BUSY;
  854. }
  855. /* Process Locked */
  856. __HAL_LOCK(hi2c);
  857. /* Check if the I2C is already enabled */
  858. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  859. {
  860. /* Enable I2C peripheral */
  861. __HAL_I2C_ENABLE(hi2c);
  862. }
  863. /* Disable Pos */
  864. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  865. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  866. hi2c->Mode = HAL_I2C_MODE_MASTER;
  867. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  868. /* Prepare transfer parameters */
  869. hi2c->pBuffPtr = pData;
  870. hi2c->XferCount = Size;
  871. hi2c->XferSize = hi2c->XferCount;
  872. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  873. /* Send Slave Address */
  874. if (I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  875. {
  876. return HAL_ERROR;
  877. }
  878. /* Clear ADDR flag */
  879. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  880. while (hi2c->XferSize > 0U)
  881. {
  882. /* Wait until TXE flag is set */
  883. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  884. {
  885. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  886. {
  887. /* Generate Stop */
  888. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  889. }
  890. return HAL_ERROR;
  891. }
  892. /* Write data to DR */
  893. hi2c->Instance->DR = *hi2c->pBuffPtr;
  894. /* Increment Buffer pointer */
  895. hi2c->pBuffPtr++;
  896. /* Update counter */
  897. hi2c->XferCount--;
  898. hi2c->XferSize--;
  899. if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  900. {
  901. /* Write data to DR */
  902. hi2c->Instance->DR = *hi2c->pBuffPtr;
  903. /* Increment Buffer pointer */
  904. hi2c->pBuffPtr++;
  905. /* Update counter */
  906. hi2c->XferCount--;
  907. hi2c->XferSize--;
  908. }
  909. /* Wait until BTF flag is set */
  910. if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  911. {
  912. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  913. {
  914. /* Generate Stop */
  915. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  916. }
  917. return HAL_ERROR;
  918. }
  919. }
  920. /* Generate Stop */
  921. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  922. hi2c->State = HAL_I2C_STATE_READY;
  923. hi2c->Mode = HAL_I2C_MODE_NONE;
  924. /* Process Unlocked */
  925. __HAL_UNLOCK(hi2c);
  926. return HAL_OK;
  927. }
  928. else
  929. {
  930. return HAL_BUSY;
  931. }
  932. }
  933. /**
  934. * @brief Receives in master mode an amount of data in blocking mode.
  935. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  936. * the configuration information for the specified I2C.
  937. * @param DevAddress Target device address: The device 7 bits address value
  938. * in datasheet must be shifted to the left before calling the interface
  939. * @param pData Pointer to data buffer
  940. * @param Size Amount of data to be sent
  941. * @param Timeout Timeout duration
  942. * @retval HAL status
  943. */
  944. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  945. {
  946. /* Init tickstart for timeout management*/
  947. uint32_t tickstart = HAL_GetTick();
  948. if (hi2c->State == HAL_I2C_STATE_READY)
  949. {
  950. /* Wait until BUSY flag is reset */
  951. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  952. {
  953. return HAL_BUSY;
  954. }
  955. /* Process Locked */
  956. __HAL_LOCK(hi2c);
  957. /* Check if the I2C is already enabled */
  958. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  959. {
  960. /* Enable I2C peripheral */
  961. __HAL_I2C_ENABLE(hi2c);
  962. }
  963. /* Disable Pos */
  964. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  965. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  966. hi2c->Mode = HAL_I2C_MODE_MASTER;
  967. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  968. /* Prepare transfer parameters */
  969. hi2c->pBuffPtr = pData;
  970. hi2c->XferCount = Size;
  971. hi2c->XferSize = hi2c->XferCount;
  972. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  973. /* Send Slave Address */
  974. if (I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  975. {
  976. return HAL_ERROR;
  977. }
  978. if (hi2c->XferSize == 0U)
  979. {
  980. /* Clear ADDR flag */
  981. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  982. /* Generate Stop */
  983. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  984. }
  985. else if (hi2c->XferSize == 1U)
  986. {
  987. /* Disable Acknowledge */
  988. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  989. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  990. software sequence must complete before the current byte end of transfer */
  991. __disable_irq();
  992. /* Clear ADDR flag */
  993. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  994. /* Generate Stop */
  995. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  996. /* Re-enable IRQs */
  997. __enable_irq();
  998. }
  999. else if (hi2c->XferSize == 2U)
  1000. {
  1001. /* Enable Pos */
  1002. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1003. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1004. software sequence must complete before the current byte end of transfer */
  1005. __disable_irq();
  1006. /* Clear ADDR flag */
  1007. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1008. /* Disable Acknowledge */
  1009. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1010. /* Re-enable IRQs */
  1011. __enable_irq();
  1012. }
  1013. else
  1014. {
  1015. /* Enable Acknowledge */
  1016. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1017. /* Clear ADDR flag */
  1018. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1019. }
  1020. while (hi2c->XferSize > 0U)
  1021. {
  1022. if (hi2c->XferSize <= 3U)
  1023. {
  1024. /* One byte */
  1025. if (hi2c->XferSize == 1U)
  1026. {
  1027. /* Wait until RXNE flag is set */
  1028. if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1029. {
  1030. return HAL_ERROR;
  1031. }
  1032. /* Read data from DR */
  1033. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1034. /* Increment Buffer pointer */
  1035. hi2c->pBuffPtr++;
  1036. /* Update counter */
  1037. hi2c->XferSize--;
  1038. hi2c->XferCount--;
  1039. }
  1040. /* Two bytes */
  1041. else if (hi2c->XferSize == 2U)
  1042. {
  1043. /* Wait until BTF flag is set */
  1044. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1045. {
  1046. return HAL_ERROR;
  1047. }
  1048. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1049. software sequence must complete before the current byte end of transfer */
  1050. __disable_irq();
  1051. /* Generate Stop */
  1052. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1053. /* Read data from DR */
  1054. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1055. /* Increment Buffer pointer */
  1056. hi2c->pBuffPtr++;
  1057. /* Update counter */
  1058. hi2c->XferSize--;
  1059. hi2c->XferCount--;
  1060. /* Re-enable IRQs */
  1061. __enable_irq();
  1062. /* Read data from DR */
  1063. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1064. /* Increment Buffer pointer */
  1065. hi2c->pBuffPtr++;
  1066. /* Update counter */
  1067. hi2c->XferSize--;
  1068. hi2c->XferCount--;
  1069. }
  1070. /* 3 Last bytes */
  1071. else
  1072. {
  1073. /* Wait until BTF flag is set */
  1074. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1075. {
  1076. return HAL_ERROR;
  1077. }
  1078. /* Disable Acknowledge */
  1079. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1080. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1081. software sequence must complete before the current byte end of transfer */
  1082. __disable_irq();
  1083. /* Read data from DR */
  1084. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1085. /* Increment Buffer pointer */
  1086. hi2c->pBuffPtr++;
  1087. /* Update counter */
  1088. hi2c->XferSize--;
  1089. hi2c->XferCount--;
  1090. /* Wait until BTF flag is set */
  1091. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1092. {
  1093. return HAL_ERROR;
  1094. }
  1095. /* Generate Stop */
  1096. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1097. /* Read data from DR */
  1098. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1099. /* Increment Buffer pointer */
  1100. hi2c->pBuffPtr++;
  1101. /* Update counter */
  1102. hi2c->XferSize--;
  1103. hi2c->XferCount--;
  1104. /* Re-enable IRQs */
  1105. __enable_irq();
  1106. /* Read data from DR */
  1107. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1108. /* Increment Buffer pointer */
  1109. hi2c->pBuffPtr++;
  1110. /* Update counter */
  1111. hi2c->XferSize--;
  1112. hi2c->XferCount--;
  1113. }
  1114. }
  1115. else
  1116. {
  1117. /* Wait until RXNE flag is set */
  1118. if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1119. {
  1120. return HAL_ERROR;
  1121. }
  1122. /* Read data from DR */
  1123. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1124. /* Increment Buffer pointer */
  1125. hi2c->pBuffPtr++;
  1126. /* Update counter */
  1127. hi2c->XferSize--;
  1128. hi2c->XferCount--;
  1129. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  1130. {
  1131. /* Read data from DR */
  1132. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1133. /* Increment Buffer pointer */
  1134. hi2c->pBuffPtr++;
  1135. /* Update counter */
  1136. hi2c->XferSize--;
  1137. hi2c->XferCount--;
  1138. }
  1139. }
  1140. }
  1141. hi2c->State = HAL_I2C_STATE_READY;
  1142. hi2c->Mode = HAL_I2C_MODE_NONE;
  1143. /* Process Unlocked */
  1144. __HAL_UNLOCK(hi2c);
  1145. return HAL_OK;
  1146. }
  1147. else
  1148. {
  1149. return HAL_BUSY;
  1150. }
  1151. }
  1152. /**
  1153. * @brief Transmits in slave mode an amount of data in blocking mode.
  1154. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1155. * the configuration information for the specified I2C.
  1156. * @param pData Pointer to data buffer
  1157. * @param Size Amount of data to be sent
  1158. * @param Timeout Timeout duration
  1159. * @retval HAL status
  1160. */
  1161. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1162. {
  1163. /* Init tickstart for timeout management*/
  1164. uint32_t tickstart = HAL_GetTick();
  1165. if (hi2c->State == HAL_I2C_STATE_READY)
  1166. {
  1167. if ((pData == NULL) || (Size == 0U))
  1168. {
  1169. return HAL_ERROR;
  1170. }
  1171. /* Process Locked */
  1172. __HAL_LOCK(hi2c);
  1173. /* Check if the I2C is already enabled */
  1174. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1175. {
  1176. /* Enable I2C peripheral */
  1177. __HAL_I2C_ENABLE(hi2c);
  1178. }
  1179. /* Disable Pos */
  1180. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1181. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1182. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1183. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1184. /* Prepare transfer parameters */
  1185. hi2c->pBuffPtr = pData;
  1186. hi2c->XferCount = Size;
  1187. hi2c->XferSize = hi2c->XferCount;
  1188. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1189. /* Enable Address Acknowledge */
  1190. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1191. /* Wait until ADDR flag is set */
  1192. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1193. {
  1194. return HAL_ERROR;
  1195. }
  1196. /* Clear ADDR flag */
  1197. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1198. while (hi2c->XferSize > 0U)
  1199. {
  1200. /* Wait until TXE flag is set */
  1201. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1202. {
  1203. /* Disable Address Acknowledge */
  1204. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1205. return HAL_ERROR;
  1206. }
  1207. /* Write data to DR */
  1208. hi2c->Instance->DR = *hi2c->pBuffPtr;
  1209. /* Increment Buffer pointer */
  1210. hi2c->pBuffPtr++;
  1211. /* Update counter */
  1212. hi2c->XferCount--;
  1213. hi2c->XferSize--;
  1214. if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1215. {
  1216. /* Write data to DR */
  1217. hi2c->Instance->DR = *hi2c->pBuffPtr;
  1218. /* Increment Buffer pointer */
  1219. hi2c->pBuffPtr++;
  1220. /* Update counter */
  1221. hi2c->XferCount--;
  1222. hi2c->XferSize--;
  1223. }
  1224. }
  1225. /* Wait until AF flag is set */
  1226. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  1227. {
  1228. return HAL_ERROR;
  1229. }
  1230. /* Clear AF flag */
  1231. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  1232. /* Disable Address Acknowledge */
  1233. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1234. hi2c->State = HAL_I2C_STATE_READY;
  1235. hi2c->Mode = HAL_I2C_MODE_NONE;
  1236. /* Process Unlocked */
  1237. __HAL_UNLOCK(hi2c);
  1238. return HAL_OK;
  1239. }
  1240. else
  1241. {
  1242. return HAL_BUSY;
  1243. }
  1244. }
  1245. /**
  1246. * @brief Receive in slave mode an amount of data in blocking mode
  1247. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1248. * the configuration information for the specified I2C.
  1249. * @param pData Pointer to data buffer
  1250. * @param Size Amount of data to be sent
  1251. * @param Timeout Timeout duration
  1252. * @retval HAL status
  1253. */
  1254. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1255. {
  1256. /* Init tickstart for timeout management*/
  1257. uint32_t tickstart = HAL_GetTick();
  1258. if (hi2c->State == HAL_I2C_STATE_READY)
  1259. {
  1260. if ((pData == NULL) || (Size == (uint16_t)0))
  1261. {
  1262. return HAL_ERROR;
  1263. }
  1264. /* Process Locked */
  1265. __HAL_LOCK(hi2c);
  1266. /* Check if the I2C is already enabled */
  1267. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1268. {
  1269. /* Enable I2C peripheral */
  1270. __HAL_I2C_ENABLE(hi2c);
  1271. }
  1272. /* Disable Pos */
  1273. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1274. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1275. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1276. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1277. /* Prepare transfer parameters */
  1278. hi2c->pBuffPtr = pData;
  1279. hi2c->XferCount = Size;
  1280. hi2c->XferSize = hi2c->XferCount;
  1281. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1282. /* Enable Address Acknowledge */
  1283. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1284. /* Wait until ADDR flag is set */
  1285. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  1286. {
  1287. return HAL_ERROR;
  1288. }
  1289. /* Clear ADDR flag */
  1290. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1291. while (hi2c->XferSize > 0U)
  1292. {
  1293. /* Wait until RXNE flag is set */
  1294. if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1295. {
  1296. /* Disable Address Acknowledge */
  1297. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1298. return HAL_ERROR;
  1299. }
  1300. /* Read data from DR */
  1301. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1302. /* Increment Buffer pointer */
  1303. hi2c->pBuffPtr++;
  1304. /* Update counter */
  1305. hi2c->XferSize--;
  1306. hi2c->XferCount--;
  1307. if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1308. {
  1309. /* Read data from DR */
  1310. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1311. /* Increment Buffer pointer */
  1312. hi2c->pBuffPtr++;
  1313. /* Update counter */
  1314. hi2c->XferSize--;
  1315. hi2c->XferCount--;
  1316. }
  1317. }
  1318. /* Wait until STOP flag is set */
  1319. if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1320. {
  1321. /* Disable Address Acknowledge */
  1322. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1323. return HAL_ERROR;
  1324. }
  1325. /* Clear STOP flag */
  1326. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1327. /* Disable Address Acknowledge */
  1328. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1329. hi2c->State = HAL_I2C_STATE_READY;
  1330. hi2c->Mode = HAL_I2C_MODE_NONE;
  1331. /* Process Unlocked */
  1332. __HAL_UNLOCK(hi2c);
  1333. return HAL_OK;
  1334. }
  1335. else
  1336. {
  1337. return HAL_BUSY;
  1338. }
  1339. }
  1340. /**
  1341. * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1342. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1343. * the configuration information for the specified I2C.
  1344. * @param DevAddress Target device address: The device 7 bits address value
  1345. * in datasheet must be shifted to the left before calling the interface
  1346. * @param pData Pointer to data buffer
  1347. * @param Size Amount of data to be sent
  1348. * @retval HAL status
  1349. */
  1350. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1351. {
  1352. __IO uint32_t count = 0U;
  1353. if (hi2c->State == HAL_I2C_STATE_READY)
  1354. {
  1355. /* Wait until BUSY flag is reset */
  1356. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1357. do
  1358. {
  1359. count--;
  1360. if (count == 0U)
  1361. {
  1362. hi2c->PreviousState = I2C_STATE_NONE;
  1363. hi2c->State = HAL_I2C_STATE_READY;
  1364. hi2c->Mode = HAL_I2C_MODE_NONE;
  1365. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1366. /* Process Unlocked */
  1367. __HAL_UNLOCK(hi2c);
  1368. return HAL_ERROR;
  1369. }
  1370. }
  1371. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1372. /* Process Locked */
  1373. __HAL_LOCK(hi2c);
  1374. /* Check if the I2C is already enabled */
  1375. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1376. {
  1377. /* Enable I2C peripheral */
  1378. __HAL_I2C_ENABLE(hi2c);
  1379. }
  1380. /* Disable Pos */
  1381. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1382. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1383. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1384. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1385. /* Prepare transfer parameters */
  1386. hi2c->pBuffPtr = pData;
  1387. hi2c->XferCount = Size;
  1388. hi2c->XferSize = hi2c->XferCount;
  1389. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1390. hi2c->Devaddress = DevAddress;
  1391. /* Generate Start */
  1392. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1393. /* Process Unlocked */
  1394. __HAL_UNLOCK(hi2c);
  1395. /* Note : The I2C interrupts must be enabled after unlocking current process
  1396. to avoid the risk of I2C interrupt handle execution before current
  1397. process unlock */
  1398. /* Enable EVT, BUF and ERR interrupt */
  1399. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1400. return HAL_OK;
  1401. }
  1402. else
  1403. {
  1404. return HAL_BUSY;
  1405. }
  1406. }
  1407. /**
  1408. * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
  1409. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1410. * the configuration information for the specified I2C.
  1411. * @param DevAddress Target device address: The device 7 bits address value
  1412. * in datasheet must be shifted to the left before calling the interface
  1413. * @param pData Pointer to data buffer
  1414. * @param Size Amount of data to be sent
  1415. * @retval HAL status
  1416. */
  1417. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1418. {
  1419. __IO uint32_t count = 0U;
  1420. if (hi2c->State == HAL_I2C_STATE_READY)
  1421. {
  1422. /* Wait until BUSY flag is reset */
  1423. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1424. do
  1425. {
  1426. count--;
  1427. if (count == 0U)
  1428. {
  1429. hi2c->PreviousState = I2C_STATE_NONE;
  1430. hi2c->State = HAL_I2C_STATE_READY;
  1431. hi2c->Mode = HAL_I2C_MODE_NONE;
  1432. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1433. /* Process Unlocked */
  1434. __HAL_UNLOCK(hi2c);
  1435. return HAL_ERROR;
  1436. }
  1437. }
  1438. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1439. /* Process Locked */
  1440. __HAL_LOCK(hi2c);
  1441. /* Check if the I2C is already enabled */
  1442. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1443. {
  1444. /* Enable I2C peripheral */
  1445. __HAL_I2C_ENABLE(hi2c);
  1446. }
  1447. /* Disable Pos */
  1448. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1449. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1450. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1451. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1452. /* Prepare transfer parameters */
  1453. hi2c->pBuffPtr = pData;
  1454. hi2c->XferCount = Size;
  1455. hi2c->XferSize = hi2c->XferCount;
  1456. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1457. hi2c->Devaddress = DevAddress;
  1458. /* Enable Acknowledge */
  1459. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1460. /* Generate Start */
  1461. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1462. /* Process Unlocked */
  1463. __HAL_UNLOCK(hi2c);
  1464. /* Note : The I2C interrupts must be enabled after unlocking current process
  1465. to avoid the risk of I2C interrupt handle execution before current
  1466. process unlock */
  1467. /* Enable EVT, BUF and ERR interrupt */
  1468. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1469. return HAL_OK;
  1470. }
  1471. else
  1472. {
  1473. return HAL_BUSY;
  1474. }
  1475. }
  1476. /**
  1477. * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1478. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1479. * the configuration information for the specified I2C.
  1480. * @param pData Pointer to data buffer
  1481. * @param Size Amount of data to be sent
  1482. * @retval HAL status
  1483. */
  1484. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1485. {
  1486. if (hi2c->State == HAL_I2C_STATE_READY)
  1487. {
  1488. if ((pData == NULL) || (Size == 0U))
  1489. {
  1490. return HAL_ERROR;
  1491. }
  1492. /* Process Locked */
  1493. __HAL_LOCK(hi2c);
  1494. /* Check if the I2C is already enabled */
  1495. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1496. {
  1497. /* Enable I2C peripheral */
  1498. __HAL_I2C_ENABLE(hi2c);
  1499. }
  1500. /* Disable Pos */
  1501. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1502. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1503. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1504. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1505. /* Prepare transfer parameters */
  1506. hi2c->pBuffPtr = pData;
  1507. hi2c->XferCount = Size;
  1508. hi2c->XferSize = hi2c->XferCount;
  1509. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1510. /* Enable Address Acknowledge */
  1511. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1512. /* Process Unlocked */
  1513. __HAL_UNLOCK(hi2c);
  1514. /* Note : The I2C interrupts must be enabled after unlocking current process
  1515. to avoid the risk of I2C interrupt handle execution before current
  1516. process unlock */
  1517. /* Enable EVT, BUF and ERR interrupt */
  1518. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1519. return HAL_OK;
  1520. }
  1521. else
  1522. {
  1523. return HAL_BUSY;
  1524. }
  1525. }
  1526. /**
  1527. * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1528. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1529. * the configuration information for the specified I2C.
  1530. * @param pData Pointer to data buffer
  1531. * @param Size Amount of data to be sent
  1532. * @retval HAL status
  1533. */
  1534. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1535. {
  1536. if (hi2c->State == HAL_I2C_STATE_READY)
  1537. {
  1538. if ((pData == NULL) || (Size == 0U))
  1539. {
  1540. return HAL_ERROR;
  1541. }
  1542. /* Process Locked */
  1543. __HAL_LOCK(hi2c);
  1544. /* Check if the I2C is already enabled */
  1545. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1546. {
  1547. /* Enable I2C peripheral */
  1548. __HAL_I2C_ENABLE(hi2c);
  1549. }
  1550. /* Disable Pos */
  1551. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1552. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1553. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1554. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1555. /* Prepare transfer parameters */
  1556. hi2c->pBuffPtr = pData;
  1557. hi2c->XferCount = Size;
  1558. hi2c->XferSize = hi2c->XferCount;
  1559. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1560. /* Enable Address Acknowledge */
  1561. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1562. /* Process Unlocked */
  1563. __HAL_UNLOCK(hi2c);
  1564. /* Note : The I2C interrupts must be enabled after unlocking current process
  1565. to avoid the risk of I2C interrupt handle execution before current
  1566. process unlock */
  1567. /* Enable EVT, BUF and ERR interrupt */
  1568. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1569. return HAL_OK;
  1570. }
  1571. else
  1572. {
  1573. return HAL_BUSY;
  1574. }
  1575. }
  1576. /**
  1577. * @brief Write an amount of data in blocking mode to a specific memory address
  1578. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1579. * the configuration information for the specified I2C.
  1580. * @param DevAddress Target device address: The device 7 bits address value
  1581. * in datasheet must be shifted to the left before calling the interface
  1582. * @param MemAddress Internal memory address
  1583. * @param MemAddSize Size of internal memory address
  1584. * @param pData Pointer to data buffer
  1585. * @param Size Amount of data to be sent
  1586. * @param Timeout Timeout duration
  1587. * @retval HAL status
  1588. */
  1589. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1590. {
  1591. /* Init tickstart for timeout management*/
  1592. uint32_t tickstart = HAL_GetTick();
  1593. /* Check the parameters */
  1594. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1595. if (hi2c->State == HAL_I2C_STATE_READY)
  1596. {
  1597. /* Wait until BUSY flag is reset */
  1598. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1599. {
  1600. return HAL_BUSY;
  1601. }
  1602. /* Process Locked */
  1603. __HAL_LOCK(hi2c);
  1604. /* Check if the I2C is already enabled */
  1605. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1606. {
  1607. /* Enable I2C peripheral */
  1608. __HAL_I2C_ENABLE(hi2c);
  1609. }
  1610. /* Disable Pos */
  1611. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1612. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1613. hi2c->Mode = HAL_I2C_MODE_MEM;
  1614. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1615. /* Prepare transfer parameters */
  1616. hi2c->pBuffPtr = pData;
  1617. hi2c->XferCount = Size;
  1618. hi2c->XferSize = hi2c->XferCount;
  1619. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1620. /* Send Slave Address and Memory Address */
  1621. if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1622. {
  1623. return HAL_ERROR;
  1624. }
  1625. while (hi2c->XferSize > 0U)
  1626. {
  1627. /* Wait until TXE flag is set */
  1628. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1629. {
  1630. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1631. {
  1632. /* Generate Stop */
  1633. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1634. }
  1635. return HAL_ERROR;
  1636. }
  1637. /* Write data to DR */
  1638. hi2c->Instance->DR = *hi2c->pBuffPtr;
  1639. /* Increment Buffer pointer */
  1640. hi2c->pBuffPtr++;
  1641. /* Update counter */
  1642. hi2c->XferSize--;
  1643. hi2c->XferCount--;
  1644. if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  1645. {
  1646. /* Write data to DR */
  1647. hi2c->Instance->DR = *hi2c->pBuffPtr;
  1648. /* Increment Buffer pointer */
  1649. hi2c->pBuffPtr++;
  1650. /* Update counter */
  1651. hi2c->XferSize--;
  1652. hi2c->XferCount--;
  1653. }
  1654. }
  1655. /* Wait until BTF flag is set */
  1656. if (I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1657. {
  1658. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  1659. {
  1660. /* Generate Stop */
  1661. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1662. }
  1663. return HAL_ERROR;
  1664. }
  1665. /* Generate Stop */
  1666. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1667. hi2c->State = HAL_I2C_STATE_READY;
  1668. hi2c->Mode = HAL_I2C_MODE_NONE;
  1669. /* Process Unlocked */
  1670. __HAL_UNLOCK(hi2c);
  1671. return HAL_OK;
  1672. }
  1673. else
  1674. {
  1675. return HAL_BUSY;
  1676. }
  1677. }
  1678. /**
  1679. * @brief Read an amount of data in blocking mode from a specific memory address
  1680. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1681. * the configuration information for the specified I2C.
  1682. * @param DevAddress Target device address: The device 7 bits address value
  1683. * in datasheet must be shifted to the left before calling the interface
  1684. * @param MemAddress Internal memory address
  1685. * @param MemAddSize Size of internal memory address
  1686. * @param pData Pointer to data buffer
  1687. * @param Size Amount of data to be sent
  1688. * @param Timeout Timeout duration
  1689. * @retval HAL status
  1690. */
  1691. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  1692. {
  1693. /* Init tickstart for timeout management*/
  1694. uint32_t tickstart = HAL_GetTick();
  1695. /* Check the parameters */
  1696. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1697. if (hi2c->State == HAL_I2C_STATE_READY)
  1698. {
  1699. /* Wait until BUSY flag is reset */
  1700. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  1701. {
  1702. return HAL_BUSY;
  1703. }
  1704. /* Process Locked */
  1705. __HAL_LOCK(hi2c);
  1706. /* Check if the I2C is already enabled */
  1707. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1708. {
  1709. /* Enable I2C peripheral */
  1710. __HAL_I2C_ENABLE(hi2c);
  1711. }
  1712. /* Disable Pos */
  1713. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1714. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1715. hi2c->Mode = HAL_I2C_MODE_MEM;
  1716. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1717. /* Prepare transfer parameters */
  1718. hi2c->pBuffPtr = pData;
  1719. hi2c->XferCount = Size;
  1720. hi2c->XferSize = hi2c->XferCount;
  1721. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1722. /* Send Slave Address and Memory Address */
  1723. if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  1724. {
  1725. return HAL_ERROR;
  1726. }
  1727. if (hi2c->XferSize == 0U)
  1728. {
  1729. /* Clear ADDR flag */
  1730. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1731. /* Generate Stop */
  1732. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1733. }
  1734. else if (hi2c->XferSize == 1U)
  1735. {
  1736. /* Disable Acknowledge */
  1737. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1738. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1739. software sequence must complete before the current byte end of transfer */
  1740. __disable_irq();
  1741. /* Clear ADDR flag */
  1742. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1743. /* Generate Stop */
  1744. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1745. /* Re-enable IRQs */
  1746. __enable_irq();
  1747. }
  1748. else if (hi2c->XferSize == 2U)
  1749. {
  1750. /* Enable Pos */
  1751. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1752. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1753. software sequence must complete before the current byte end of transfer */
  1754. __disable_irq();
  1755. /* Clear ADDR flag */
  1756. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1757. /* Disable Acknowledge */
  1758. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1759. /* Re-enable IRQs */
  1760. __enable_irq();
  1761. }
  1762. else
  1763. {
  1764. /* Enable Acknowledge */
  1765. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1766. /* Clear ADDR flag */
  1767. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1768. }
  1769. while (hi2c->XferSize > 0U)
  1770. {
  1771. if (hi2c->XferSize <= 3U)
  1772. {
  1773. /* One byte */
  1774. if (hi2c->XferSize == 1U)
  1775. {
  1776. /* Wait until RXNE flag is set */
  1777. if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1778. {
  1779. return HAL_ERROR;
  1780. }
  1781. /* Read data from DR */
  1782. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1783. /* Increment Buffer pointer */
  1784. hi2c->pBuffPtr++;
  1785. /* Update counter */
  1786. hi2c->XferSize--;
  1787. hi2c->XferCount--;
  1788. }
  1789. /* Two bytes */
  1790. else if (hi2c->XferSize == 2U)
  1791. {
  1792. /* Wait until BTF flag is set */
  1793. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1794. {
  1795. return HAL_ERROR;
  1796. }
  1797. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1798. software sequence must complete before the current byte end of transfer */
  1799. __disable_irq();
  1800. /* Generate Stop */
  1801. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1802. /* Read data from DR */
  1803. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1804. /* Increment Buffer pointer */
  1805. hi2c->pBuffPtr++;
  1806. /* Update counter */
  1807. hi2c->XferSize--;
  1808. hi2c->XferCount--;
  1809. /* Re-enable IRQs */
  1810. __enable_irq();
  1811. /* Read data from DR */
  1812. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1813. /* Increment Buffer pointer */
  1814. hi2c->pBuffPtr++;
  1815. /* Update counter */
  1816. hi2c->XferSize--;
  1817. hi2c->XferCount--;
  1818. }
  1819. /* 3 Last bytes */
  1820. else
  1821. {
  1822. /* Wait until BTF flag is set */
  1823. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1824. {
  1825. return HAL_ERROR;
  1826. }
  1827. /* Disable Acknowledge */
  1828. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  1829. /* Disable all active IRQs around ADDR clearing and STOP programming because the EV6_3
  1830. software sequence must complete before the current byte end of transfer */
  1831. __disable_irq();
  1832. /* Read data from DR */
  1833. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1834. /* Increment Buffer pointer */
  1835. hi2c->pBuffPtr++;
  1836. /* Update counter */
  1837. hi2c->XferSize--;
  1838. hi2c->XferCount--;
  1839. /* Wait until BTF flag is set */
  1840. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  1841. {
  1842. return HAL_ERROR;
  1843. }
  1844. /* Generate Stop */
  1845. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  1846. /* Read data from DR */
  1847. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1848. /* Increment Buffer pointer */
  1849. hi2c->pBuffPtr++;
  1850. /* Update counter */
  1851. hi2c->XferSize--;
  1852. hi2c->XferCount--;
  1853. /* Re-enable IRQs */
  1854. __enable_irq();
  1855. /* Read data from DR */
  1856. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1857. /* Increment Buffer pointer */
  1858. hi2c->pBuffPtr++;
  1859. /* Update counter */
  1860. hi2c->XferSize--;
  1861. hi2c->XferCount--;
  1862. }
  1863. }
  1864. else
  1865. {
  1866. /* Wait until RXNE flag is set */
  1867. if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  1868. {
  1869. return HAL_ERROR;
  1870. }
  1871. /* Read data from DR */
  1872. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1873. /* Increment Buffer pointer */
  1874. hi2c->pBuffPtr++;
  1875. /* Update counter */
  1876. hi2c->XferSize--;
  1877. hi2c->XferCount--;
  1878. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  1879. {
  1880. /* Read data from DR */
  1881. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  1882. /* Increment Buffer pointer */
  1883. hi2c->pBuffPtr++;
  1884. /* Update counter */
  1885. hi2c->XferSize--;
  1886. hi2c->XferCount--;
  1887. }
  1888. }
  1889. }
  1890. hi2c->State = HAL_I2C_STATE_READY;
  1891. hi2c->Mode = HAL_I2C_MODE_NONE;
  1892. /* Process Unlocked */
  1893. __HAL_UNLOCK(hi2c);
  1894. return HAL_OK;
  1895. }
  1896. else
  1897. {
  1898. return HAL_BUSY;
  1899. }
  1900. }
  1901. /**
  1902. * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  1903. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1904. * the configuration information for the specified I2C.
  1905. * @param DevAddress Target device address: The device 7 bits address value
  1906. * in datasheet must be shifted to the left before calling the interface
  1907. * @param MemAddress Internal memory address
  1908. * @param MemAddSize Size of internal memory address
  1909. * @param pData Pointer to data buffer
  1910. * @param Size Amount of data to be sent
  1911. * @retval HAL status
  1912. */
  1913. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  1914. {
  1915. __IO uint32_t count = 0U;
  1916. /* Check the parameters */
  1917. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1918. if (hi2c->State == HAL_I2C_STATE_READY)
  1919. {
  1920. /* Wait until BUSY flag is reset */
  1921. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1922. do
  1923. {
  1924. count--;
  1925. if (count == 0U)
  1926. {
  1927. hi2c->PreviousState = I2C_STATE_NONE;
  1928. hi2c->State = HAL_I2C_STATE_READY;
  1929. hi2c->Mode = HAL_I2C_MODE_NONE;
  1930. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  1931. /* Process Unlocked */
  1932. __HAL_UNLOCK(hi2c);
  1933. return HAL_ERROR;
  1934. }
  1935. }
  1936. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1937. /* Process Locked */
  1938. __HAL_LOCK(hi2c);
  1939. /* Check if the I2C is already enabled */
  1940. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1941. {
  1942. /* Enable I2C peripheral */
  1943. __HAL_I2C_ENABLE(hi2c);
  1944. }
  1945. /* Disable Pos */
  1946. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  1947. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1948. hi2c->Mode = HAL_I2C_MODE_MEM;
  1949. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1950. /* Prepare transfer parameters */
  1951. hi2c->pBuffPtr = pData;
  1952. hi2c->XferCount = Size;
  1953. hi2c->XferSize = hi2c->XferCount;
  1954. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1955. hi2c->Devaddress = DevAddress;
  1956. hi2c->Memaddress = MemAddress;
  1957. hi2c->MemaddSize = MemAddSize;
  1958. hi2c->EventCount = 0U;
  1959. /* Generate Start */
  1960. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  1961. /* Process Unlocked */
  1962. __HAL_UNLOCK(hi2c);
  1963. /* Note : The I2C interrupts must be enabled after unlocking current process
  1964. to avoid the risk of I2C interrupt handle execution before current
  1965. process unlock */
  1966. /* Enable EVT, BUF and ERR interrupt */
  1967. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1968. return HAL_OK;
  1969. }
  1970. else
  1971. {
  1972. return HAL_BUSY;
  1973. }
  1974. }
  1975. /**
  1976. * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  1977. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1978. * the configuration information for the specified I2C.
  1979. * @param DevAddress Target device address
  1980. * @param MemAddress Internal memory address
  1981. * @param MemAddSize Size of internal memory address
  1982. * @param pData Pointer to data buffer
  1983. * @param Size Amount of data to be sent
  1984. * @retval HAL status
  1985. */
  1986. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  1987. {
  1988. __IO uint32_t count = 0U;
  1989. /* Check the parameters */
  1990. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  1991. if (hi2c->State == HAL_I2C_STATE_READY)
  1992. {
  1993. /* Wait until BUSY flag is reset */
  1994. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  1995. do
  1996. {
  1997. count--;
  1998. if (count == 0U)
  1999. {
  2000. hi2c->PreviousState = I2C_STATE_NONE;
  2001. hi2c->State = HAL_I2C_STATE_READY;
  2002. hi2c->Mode = HAL_I2C_MODE_NONE;
  2003. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2004. /* Process Unlocked */
  2005. __HAL_UNLOCK(hi2c);
  2006. return HAL_ERROR;
  2007. }
  2008. }
  2009. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2010. /* Process Locked */
  2011. __HAL_LOCK(hi2c);
  2012. /* Check if the I2C is already enabled */
  2013. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2014. {
  2015. /* Enable I2C peripheral */
  2016. __HAL_I2C_ENABLE(hi2c);
  2017. }
  2018. /* Disable Pos */
  2019. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2020. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2021. hi2c->Mode = HAL_I2C_MODE_MEM;
  2022. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2023. /* Prepare transfer parameters */
  2024. hi2c->pBuffPtr = pData;
  2025. hi2c->XferCount = Size;
  2026. hi2c->XferSize = hi2c->XferCount;
  2027. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2028. hi2c->Devaddress = DevAddress;
  2029. hi2c->Memaddress = MemAddress;
  2030. hi2c->MemaddSize = MemAddSize;
  2031. hi2c->EventCount = 0U;
  2032. /* Enable Acknowledge */
  2033. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2034. /* Generate Start */
  2035. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2036. /* Process Unlocked */
  2037. __HAL_UNLOCK(hi2c);
  2038. if (hi2c->XferSize > 0U)
  2039. {
  2040. /* Note : The I2C interrupts must be enabled after unlocking current process
  2041. to avoid the risk of I2C interrupt handle execution before current
  2042. process unlock */
  2043. /* Enable EVT, BUF and ERR interrupt */
  2044. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2045. }
  2046. return HAL_OK;
  2047. }
  2048. else
  2049. {
  2050. return HAL_BUSY;
  2051. }
  2052. }
  2053. /**
  2054. * @brief Checks if target device is ready for communication.
  2055. * @note This function is used with Memory devices
  2056. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2057. * the configuration information for the specified I2C.
  2058. * @param DevAddress Target device address: The device 7 bits address value
  2059. * in datasheet must be shifted to the left before calling the interface
  2060. * @param Trials Number of trials
  2061. * @param Timeout Timeout duration
  2062. * @retval HAL status
  2063. */
  2064. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  2065. {
  2066. /* Get tick */
  2067. uint32_t tickstart = HAL_GetTick();
  2068. uint32_t I2C_Trials = 1U;
  2069. FlagStatus tmp1;
  2070. FlagStatus tmp2;
  2071. if (hi2c->State == HAL_I2C_STATE_READY)
  2072. {
  2073. /* Wait until BUSY flag is reset */
  2074. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2075. {
  2076. return HAL_BUSY;
  2077. }
  2078. /* Process Locked */
  2079. __HAL_LOCK(hi2c);
  2080. /* Check if the I2C is already enabled */
  2081. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2082. {
  2083. /* Enable I2C peripheral */
  2084. __HAL_I2C_ENABLE(hi2c);
  2085. }
  2086. /* Disable Pos */
  2087. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2088. hi2c->State = HAL_I2C_STATE_BUSY;
  2089. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2090. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2091. do
  2092. {
  2093. /* Generate Start */
  2094. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2095. /* Wait until SB flag is set */
  2096. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  2097. {
  2098. return HAL_ERROR;
  2099. }
  2100. /* Send slave address */
  2101. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2102. /* Wait until ADDR or AF flag are set */
  2103. /* Get tick */
  2104. tickstart = HAL_GetTick();
  2105. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2106. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2107. while ((hi2c->State != HAL_I2C_STATE_TIMEOUT) && (tmp1 == RESET) && (tmp2 == RESET))
  2108. {
  2109. if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U))
  2110. {
  2111. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  2112. }
  2113. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2114. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2115. }
  2116. hi2c->State = HAL_I2C_STATE_READY;
  2117. /* Check if the ADDR flag has been set */
  2118. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  2119. {
  2120. /* Generate Stop */
  2121. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2122. /* Clear ADDR Flag */
  2123. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2124. /* Wait until BUSY flag is reset */
  2125. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2126. {
  2127. return HAL_ERROR;
  2128. }
  2129. hi2c->State = HAL_I2C_STATE_READY;
  2130. /* Process Unlocked */
  2131. __HAL_UNLOCK(hi2c);
  2132. return HAL_OK;
  2133. }
  2134. else
  2135. {
  2136. /* Generate Stop */
  2137. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2138. /* Clear AF Flag */
  2139. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2140. /* Wait until BUSY flag is reset */
  2141. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2142. {
  2143. return HAL_ERROR;
  2144. }
  2145. }
  2146. /* Increment Trials */
  2147. I2C_Trials++;
  2148. }
  2149. while (I2C_Trials < Trials);
  2150. hi2c->State = HAL_I2C_STATE_READY;
  2151. /* Process Unlocked */
  2152. __HAL_UNLOCK(hi2c);
  2153. return HAL_ERROR;
  2154. }
  2155. else
  2156. {
  2157. return HAL_BUSY;
  2158. }
  2159. }
  2160. /**
  2161. * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Interrupt.
  2162. * @note This interface allow to manage repeated start condition when a direction change during transfer
  2163. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2164. * the configuration information for the specified I2C.
  2165. * @param DevAddress Target device address: The device 7 bits address value
  2166. * in datasheet must be shifted to the left before calling the interface
  2167. * @param pData Pointer to data buffer
  2168. * @param Size Amount of data to be sent
  2169. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  2170. * @retval HAL status
  2171. */
  2172. HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  2173. {
  2174. __IO uint32_t Prev_State = 0x00U;
  2175. __IO uint32_t count = 0x00U;
  2176. /* Check the parameters */
  2177. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  2178. if (hi2c->State == HAL_I2C_STATE_READY)
  2179. {
  2180. /* Check Busy Flag only if FIRST call of Master interface */
  2181. if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  2182. {
  2183. /* Wait until BUSY flag is reset */
  2184. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2185. do
  2186. {
  2187. count--;
  2188. if (count == 0U)
  2189. {
  2190. hi2c->PreviousState = I2C_STATE_NONE;
  2191. hi2c->State = HAL_I2C_STATE_READY;
  2192. hi2c->Mode = HAL_I2C_MODE_NONE;
  2193. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2194. /* Process Unlocked */
  2195. __HAL_UNLOCK(hi2c);
  2196. return HAL_ERROR;
  2197. }
  2198. }
  2199. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2200. }
  2201. /* Process Locked */
  2202. __HAL_LOCK(hi2c);
  2203. /* Check if the I2C is already enabled */
  2204. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2205. {
  2206. /* Enable I2C peripheral */
  2207. __HAL_I2C_ENABLE(hi2c);
  2208. }
  2209. /* Disable Pos */
  2210. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2211. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2212. hi2c->Mode = HAL_I2C_MODE_MASTER;
  2213. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2214. /* Prepare transfer parameters */
  2215. hi2c->pBuffPtr = pData;
  2216. hi2c->XferCount = Size;
  2217. hi2c->XferSize = hi2c->XferCount;
  2218. hi2c->XferOptions = XferOptions;
  2219. hi2c->Devaddress = DevAddress;
  2220. Prev_State = hi2c->PreviousState;
  2221. /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  2222. /* Mean Previous state is same as current state */
  2223. if ((Prev_State != I2C_STATE_MASTER_BUSY_TX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  2224. {
  2225. /* Generate Start */
  2226. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2227. }
  2228. /* Process Unlocked */
  2229. __HAL_UNLOCK(hi2c);
  2230. /* Note : The I2C interrupts must be enabled after unlocking current process
  2231. to avoid the risk of I2C interrupt handle execution before current
  2232. process unlock */
  2233. /* Enable EVT, BUF and ERR interrupt */
  2234. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2235. return HAL_OK;
  2236. }
  2237. else
  2238. {
  2239. return HAL_BUSY;
  2240. }
  2241. }
  2242. /**
  2243. * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Interrupt
  2244. * @note This interface allow to manage repeated start condition when a direction change during transfer
  2245. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2246. * the configuration information for the specified I2C.
  2247. * @param DevAddress Target device address: The device 7 bits address value
  2248. * in datasheet must be shifted to the left before calling the interface
  2249. * @param pData Pointer to data buffer
  2250. * @param Size Amount of data to be sent
  2251. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  2252. * @retval HAL status
  2253. */
  2254. HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  2255. {
  2256. __IO uint32_t Prev_State = 0x00U;
  2257. __IO uint32_t count = 0U;
  2258. uint32_t enableIT = (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2259. /* Check the parameters */
  2260. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  2261. if (hi2c->State == HAL_I2C_STATE_READY)
  2262. {
  2263. /* Check Busy Flag only if FIRST call of Master interface */
  2264. if ((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  2265. {
  2266. /* Wait until BUSY flag is reset */
  2267. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock / 25U / 1000U);
  2268. do
  2269. {
  2270. count--;
  2271. if (count == 0U)
  2272. {
  2273. hi2c->PreviousState = I2C_STATE_NONE;
  2274. hi2c->State = HAL_I2C_STATE_READY;
  2275. hi2c->Mode = HAL_I2C_MODE_NONE;
  2276. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  2277. /* Process Unlocked */
  2278. __HAL_UNLOCK(hi2c);
  2279. return HAL_ERROR;
  2280. }
  2281. }
  2282. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2283. }
  2284. /* Process Locked */
  2285. __HAL_LOCK(hi2c);
  2286. /* Check if the I2C is already enabled */
  2287. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2288. {
  2289. /* Enable I2C peripheral */
  2290. __HAL_I2C_ENABLE(hi2c);
  2291. }
  2292. /* Disable Pos */
  2293. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2294. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2295. hi2c->Mode = HAL_I2C_MODE_MASTER;
  2296. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2297. /* Prepare transfer parameters */
  2298. hi2c->pBuffPtr = pData;
  2299. hi2c->XferCount = Size;
  2300. hi2c->XferSize = hi2c->XferCount;
  2301. hi2c->XferOptions = XferOptions;
  2302. hi2c->Devaddress = DevAddress;
  2303. Prev_State = hi2c->PreviousState;
  2304. if ((hi2c->XferCount == 2U) && ((XferOptions == I2C_LAST_FRAME) || (XferOptions == I2C_LAST_FRAME_NO_STOP)))
  2305. {
  2306. if (Prev_State == I2C_STATE_MASTER_BUSY_RX)
  2307. {
  2308. /* Disable Acknowledge */
  2309. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2310. /* Enable Pos */
  2311. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2312. /* Remove Enabling of IT_BUF, mean RXNE treatment, treat the 2 bytes through BTF */
  2313. enableIT &= ~I2C_IT_BUF;
  2314. }
  2315. else
  2316. {
  2317. /* Enable Acknowledge */
  2318. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2319. }
  2320. }
  2321. else
  2322. {
  2323. /* Enable Acknowledge */
  2324. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2325. }
  2326. /* If transfer direction not change and there is no request to start another frame, do not generate Restart Condition */
  2327. /* Mean Previous state is same as current state */
  2328. if ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 1))
  2329. {
  2330. /* Generate Start */
  2331. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  2332. }
  2333. /* Process Unlocked */
  2334. __HAL_UNLOCK(hi2c);
  2335. /* Note : The I2C interrupts must be enabled after unlocking current process
  2336. to avoid the risk of I2C interrupt handle execution before current
  2337. process unlock */
  2338. /* Enable interrupts */
  2339. __HAL_I2C_ENABLE_IT(hi2c, enableIT);
  2340. return HAL_OK;
  2341. }
  2342. else
  2343. {
  2344. return HAL_BUSY;
  2345. }
  2346. }
  2347. /**
  2348. * @brief Sequential transmit in slave mode an amount of data in non-blocking mode with Interrupt
  2349. * @note This interface allow to manage repeated start condition when a direction change during transfer
  2350. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2351. * the configuration information for the specified I2C.
  2352. * @param pData Pointer to data buffer
  2353. * @param Size Amount of data to be sent
  2354. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  2355. * @retval HAL status
  2356. */
  2357. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  2358. {
  2359. /* Check the parameters */
  2360. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  2361. if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  2362. {
  2363. if ((pData == NULL) || (Size == 0U))
  2364. {
  2365. return HAL_ERROR;
  2366. }
  2367. /* Process Locked */
  2368. __HAL_LOCK(hi2c);
  2369. /* Check if the I2C is already enabled */
  2370. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2371. {
  2372. /* Enable I2C peripheral */
  2373. __HAL_I2C_ENABLE(hi2c);
  2374. }
  2375. /* Disable Pos */
  2376. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2377. hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
  2378. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  2379. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2380. /* Prepare transfer parameters */
  2381. hi2c->pBuffPtr = pData;
  2382. hi2c->XferCount = Size;
  2383. hi2c->XferSize = hi2c->XferCount;
  2384. hi2c->XferOptions = XferOptions;
  2385. /* Clear ADDR flag */
  2386. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2387. /* Process Unlocked */
  2388. __HAL_UNLOCK(hi2c);
  2389. /* Note : The I2C interrupts must be enabled after unlocking current process
  2390. to avoid the risk of I2C interrupt handle execution before current
  2391. process unlock */
  2392. /* Enable EVT, BUF and ERR interrupt */
  2393. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2394. return HAL_OK;
  2395. }
  2396. else
  2397. {
  2398. return HAL_BUSY;
  2399. }
  2400. }
  2401. /**
  2402. * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  2403. * @note This interface allow to manage repeated start condition when a direction change during transfer
  2404. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2405. * the configuration information for the specified I2C.
  2406. * @param pData Pointer to data buffer
  2407. * @param Size Amount of data to be sent
  2408. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  2409. * @retval HAL status
  2410. */
  2411. HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  2412. {
  2413. /* Check the parameters */
  2414. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  2415. if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  2416. {
  2417. if ((pData == NULL) || (Size == 0U))
  2418. {
  2419. return HAL_ERROR;
  2420. }
  2421. /* Process Locked */
  2422. __HAL_LOCK(hi2c);
  2423. /* Check if the I2C is already enabled */
  2424. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2425. {
  2426. /* Enable I2C peripheral */
  2427. __HAL_I2C_ENABLE(hi2c);
  2428. }
  2429. /* Disable Pos */
  2430. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  2431. hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
  2432. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  2433. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2434. /* Prepare transfer parameters */
  2435. hi2c->pBuffPtr = pData;
  2436. hi2c->XferCount = Size;
  2437. hi2c->XferSize = hi2c->XferCount;
  2438. hi2c->XferOptions = XferOptions;
  2439. /* Clear ADDR flag */
  2440. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2441. /* Process Unlocked */
  2442. __HAL_UNLOCK(hi2c);
  2443. /* Note : The I2C interrupts must be enabled after unlocking current process
  2444. to avoid the risk of I2C interrupt handle execution before current
  2445. process unlock */
  2446. /* Enable EVT, BUF and ERR interrupt */
  2447. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2448. return HAL_OK;
  2449. }
  2450. else
  2451. {
  2452. return HAL_BUSY;
  2453. }
  2454. }
  2455. /**
  2456. * @brief Enable the Address listen mode with Interrupt.
  2457. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2458. * the configuration information for the specified I2C.
  2459. * @retval HAL status
  2460. */
  2461. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  2462. {
  2463. if (hi2c->State == HAL_I2C_STATE_READY)
  2464. {
  2465. hi2c->State = HAL_I2C_STATE_LISTEN;
  2466. /* Check if the I2C is already enabled */
  2467. if ((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2468. {
  2469. /* Enable I2C peripheral */
  2470. __HAL_I2C_ENABLE(hi2c);
  2471. }
  2472. /* Enable Address Acknowledge */
  2473. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2474. /* Enable EVT and ERR interrupt */
  2475. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2476. return HAL_OK;
  2477. }
  2478. else
  2479. {
  2480. return HAL_BUSY;
  2481. }
  2482. }
  2483. /**
  2484. * @brief Disable the Address listen mode with Interrupt.
  2485. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2486. * the configuration information for the specified I2C.
  2487. * @retval HAL status
  2488. */
  2489. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  2490. {
  2491. /* Declaration of tmp to prevent undefined behavior of volatile usage */
  2492. uint32_t tmp;
  2493. /* Disable Address listen mode only if a transfer is not ongoing */
  2494. if (hi2c->State == HAL_I2C_STATE_LISTEN)
  2495. {
  2496. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  2497. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  2498. hi2c->State = HAL_I2C_STATE_READY;
  2499. hi2c->Mode = HAL_I2C_MODE_NONE;
  2500. /* Disable Address Acknowledge */
  2501. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2502. /* Disable EVT and ERR interrupt */
  2503. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  2504. return HAL_OK;
  2505. }
  2506. else
  2507. {
  2508. return HAL_BUSY;
  2509. }
  2510. }
  2511. /**
  2512. * @brief Abort a master I2C IT with Interrupt.
  2513. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2514. * the configuration information for the specified I2C.
  2515. * @param DevAddress Target device address: The device 7 bits address value
  2516. * in datasheet must be shifted to the left before calling the interface
  2517. * @retval HAL status
  2518. */
  2519. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  2520. {
  2521. /* Prevent unused argument(s) compilation warning */
  2522. UNUSED(DevAddress);
  2523. /* Abort Master transfer during Receive or Transmit process */
  2524. if (hi2c->Mode == HAL_I2C_MODE_MASTER)
  2525. {
  2526. /* Process Locked */
  2527. __HAL_LOCK(hi2c);
  2528. hi2c->PreviousState = I2C_STATE_NONE;
  2529. hi2c->State = HAL_I2C_STATE_ABORT;
  2530. /* Disable Acknowledge */
  2531. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  2532. /* Generate Stop */
  2533. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2534. hi2c->XferCount = 0U;
  2535. /* Disable EVT, BUF and ERR interrupt */
  2536. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2537. /* Process Unlocked */
  2538. __HAL_UNLOCK(hi2c);
  2539. /* Call the corresponding callback to inform upper layer of End of Transfer */
  2540. I2C_ITError(hi2c);
  2541. return HAL_OK;
  2542. }
  2543. else
  2544. {
  2545. /* Wrong usage of abort function */
  2546. /* This function should be used only in case of abort monitored by master device */
  2547. return HAL_ERROR;
  2548. }
  2549. }
  2550. /**
  2551. * @}
  2552. */
  2553. /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  2554. * @{
  2555. */
  2556. /**
  2557. * @brief This function handles I2C event interrupt request.
  2558. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2559. * the configuration information for the specified I2C.
  2560. * @retval None
  2561. */
  2562. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  2563. {
  2564. uint32_t sr1itflags;
  2565. uint32_t sr2itflags = 0U;
  2566. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2567. uint32_t CurrentXferOptions = hi2c->XferOptions;
  2568. HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
  2569. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  2570. /* Master or Memory mode selected */
  2571. if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2572. {
  2573. sr2itflags = READ_REG(hi2c->Instance->SR2);
  2574. sr1itflags = READ_REG(hi2c->Instance->SR1);
  2575. /* Exit IRQ event until Start Bit detected in case of Other frame requested */
  2576. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) == RESET) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(CurrentXferOptions) == 1U))
  2577. {
  2578. return;
  2579. }
  2580. /* SB Set ----------------------------------------------------------------*/
  2581. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_SB) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2582. {
  2583. /* Convert OTHER_xxx XferOptions if any */
  2584. I2C_ConvertOtherXferOptions(hi2c);
  2585. I2C_Master_SB(hi2c);
  2586. }
  2587. /* ADD10 Set -------------------------------------------------------------*/
  2588. else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADD10) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2589. {
  2590. I2C_Master_ADD10(hi2c);
  2591. }
  2592. /* ADDR Set --------------------------------------------------------------*/
  2593. else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2594. {
  2595. I2C_Master_ADDR(hi2c);
  2596. }
  2597. /* I2C in mode Transmitter -----------------------------------------------*/
  2598. else if (I2C_CHECK_FLAG(sr2itflags, I2C_FLAG_TRA) != RESET)
  2599. {
  2600. /* TXE set and BTF reset -----------------------------------------------*/
  2601. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  2602. {
  2603. I2C_MasterTransmit_TXE(hi2c);
  2604. }
  2605. /* BTF set -------------------------------------------------------------*/
  2606. else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2607. {
  2608. I2C_MasterTransmit_BTF(hi2c);
  2609. }
  2610. else
  2611. {
  2612. /* Do nothing */
  2613. }
  2614. }
  2615. /* I2C in mode Receiver --------------------------------------------------*/
  2616. else
  2617. {
  2618. /* RXNE set and BTF reset -----------------------------------------------*/
  2619. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  2620. {
  2621. I2C_MasterReceive_RXNE(hi2c);
  2622. }
  2623. /* BTF set -------------------------------------------------------------*/
  2624. else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2625. {
  2626. I2C_MasterReceive_BTF(hi2c);
  2627. }
  2628. else
  2629. {
  2630. /* Do nothing */
  2631. }
  2632. }
  2633. }
  2634. /* Slave mode selected */
  2635. else
  2636. {
  2637. /* If an error is detected, read only SR1 register to prevent */
  2638. /* a clear of ADDR flags by reading SR2 after reading SR1 in Error treatment */
  2639. if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2640. {
  2641. sr1itflags = READ_REG(hi2c->Instance->SR1);
  2642. }
  2643. else
  2644. {
  2645. sr2itflags = READ_REG(hi2c->Instance->SR2);
  2646. sr1itflags = READ_REG(hi2c->Instance->SR1);
  2647. }
  2648. /* ADDR set --------------------------------------------------------------*/
  2649. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2650. {
  2651. /* Now time to read SR2, this will clear ADDR flag automatically */
  2652. if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2653. {
  2654. sr2itflags = READ_REG(hi2c->Instance->SR2);
  2655. }
  2656. I2C_Slave_ADDR(hi2c, sr2itflags);
  2657. }
  2658. /* STOPF set --------------------------------------------------------------*/
  2659. else if (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_STOPF) != RESET)
  2660. {
  2661. I2C_Slave_STOPF(hi2c);
  2662. }
  2663. /* I2C in mode Transmitter -----------------------------------------------*/
  2664. else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  2665. {
  2666. /* TXE set and BTF reset -----------------------------------------------*/
  2667. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_TXE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  2668. {
  2669. I2C_SlaveTransmit_TXE(hi2c);
  2670. }
  2671. /* BTF set -------------------------------------------------------------*/
  2672. else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2673. {
  2674. I2C_SlaveTransmit_BTF(hi2c);
  2675. }
  2676. else
  2677. {
  2678. /* Do nothing */
  2679. }
  2680. }
  2681. /* I2C in mode Receiver --------------------------------------------------*/
  2682. else
  2683. {
  2684. /* RXNE set and BTF reset ----------------------------------------------*/
  2685. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_BUF) != RESET) && (I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) == RESET))
  2686. {
  2687. I2C_SlaveReceive_RXNE(hi2c);
  2688. }
  2689. /* BTF set -------------------------------------------------------------*/
  2690. else if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BTF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_EVT) != RESET))
  2691. {
  2692. I2C_SlaveReceive_BTF(hi2c);
  2693. }
  2694. else
  2695. {
  2696. /* Do nothing */
  2697. }
  2698. }
  2699. }
  2700. }
  2701. /**
  2702. * @brief This function handles I2C error interrupt request.
  2703. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2704. * the configuration information for the specified I2C.
  2705. * @retval None
  2706. */
  2707. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  2708. {
  2709. HAL_I2C_ModeTypeDef tmp1;
  2710. uint32_t tmp2;
  2711. HAL_I2C_StateTypeDef tmp3;
  2712. uint32_t tmp4;
  2713. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2714. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2715. uint32_t error = HAL_I2C_ERROR_NONE;
  2716. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2717. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  2718. {
  2719. error |= HAL_I2C_ERROR_BERR;
  2720. /* Clear BERR flag */
  2721. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2722. /* Workaround: Start cannot be generated after a misplaced Stop */
  2723. SET_BIT(hi2c->Instance->CR1, I2C_CR1_SWRST);
  2724. }
  2725. /* I2C Arbitration Lost error interrupt occurred ---------------------------*/
  2726. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  2727. {
  2728. error |= HAL_I2C_ERROR_ARLO;
  2729. /* Clear ARLO flag */
  2730. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2731. }
  2732. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2733. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  2734. {
  2735. tmp1 = hi2c->Mode;
  2736. tmp2 = hi2c->XferCount;
  2737. tmp3 = hi2c->State;
  2738. tmp4 = hi2c->PreviousState;
  2739. if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  2740. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  2741. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  2742. {
  2743. I2C_Slave_AF(hi2c);
  2744. }
  2745. else
  2746. {
  2747. /* Clear AF flag */
  2748. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2749. error |= HAL_I2C_ERROR_AF;
  2750. /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  2751. if (hi2c->Mode == HAL_I2C_MODE_MASTER)
  2752. {
  2753. /* Generate Stop */
  2754. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  2755. }
  2756. }
  2757. }
  2758. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  2759. if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET))
  2760. {
  2761. error |= HAL_I2C_ERROR_OVR;
  2762. /* Clear OVR flag */
  2763. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  2764. }
  2765. /* Call the Error Callback in case of Error detected -----------------------*/
  2766. if (error != HAL_I2C_ERROR_NONE)
  2767. {
  2768. hi2c->ErrorCode |= error;
  2769. I2C_ITError(hi2c);
  2770. }
  2771. }
  2772. /**
  2773. * @brief Master Tx Transfer completed callback.
  2774. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2775. * the configuration information for the specified I2C.
  2776. * @retval None
  2777. */
  2778. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2779. {
  2780. /* Prevent unused argument(s) compilation warning */
  2781. UNUSED(hi2c);
  2782. /* NOTE : This function should not be modified, when the callback is needed,
  2783. the HAL_I2C_MasterTxCpltCallback could be implemented in the user file
  2784. */
  2785. }
  2786. /**
  2787. * @brief Master Rx Transfer completed callback.
  2788. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2789. * the configuration information for the specified I2C.
  2790. * @retval None
  2791. */
  2792. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2793. {
  2794. /* Prevent unused argument(s) compilation warning */
  2795. UNUSED(hi2c);
  2796. /* NOTE : This function should not be modified, when the callback is needed,
  2797. the HAL_I2C_MasterRxCpltCallback could be implemented in the user file
  2798. */
  2799. }
  2800. /** @brief Slave Tx Transfer completed callback.
  2801. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2802. * the configuration information for the specified I2C.
  2803. * @retval None
  2804. */
  2805. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2806. {
  2807. /* Prevent unused argument(s) compilation warning */
  2808. UNUSED(hi2c);
  2809. /* NOTE : This function should not be modified, when the callback is needed,
  2810. the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file
  2811. */
  2812. }
  2813. /**
  2814. * @brief Slave Rx Transfer completed callback.
  2815. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2816. * the configuration information for the specified I2C.
  2817. * @retval None
  2818. */
  2819. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2820. {
  2821. /* Prevent unused argument(s) compilation warning */
  2822. UNUSED(hi2c);
  2823. /* NOTE : This function should not be modified, when the callback is needed,
  2824. the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
  2825. */
  2826. }
  2827. /**
  2828. * @brief Slave Address Match callback.
  2829. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2830. * the configuration information for the specified I2C.
  2831. * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferDirection_definition
  2832. * @param AddrMatchCode Address Match Code
  2833. * @retval None
  2834. */
  2835. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  2836. {
  2837. /* Prevent unused argument(s) compilation warning */
  2838. UNUSED(hi2c);
  2839. UNUSED(TransferDirection);
  2840. UNUSED(AddrMatchCode);
  2841. /* NOTE : This function should not be modified, when the callback is needed,
  2842. the HAL_I2C_AddrCallback() could be implemented in the user file
  2843. */
  2844. }
  2845. /**
  2846. * @brief Listen Complete callback.
  2847. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2848. * the configuration information for the specified I2C.
  2849. * @retval None
  2850. */
  2851. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  2852. {
  2853. /* Prevent unused argument(s) compilation warning */
  2854. UNUSED(hi2c);
  2855. /* NOTE : This function should not be modified, when the callback is needed,
  2856. the HAL_I2C_ListenCpltCallback() could be implemented in the user file
  2857. */
  2858. }
  2859. /**
  2860. * @brief Memory Tx Transfer completed callback.
  2861. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2862. * the configuration information for the specified I2C.
  2863. * @retval None
  2864. */
  2865. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2866. {
  2867. /* Prevent unused argument(s) compilation warning */
  2868. UNUSED(hi2c);
  2869. /* NOTE : This function should not be modified, when the callback is needed,
  2870. the HAL_I2C_MemTxCpltCallback could be implemented in the user file
  2871. */
  2872. }
  2873. /**
  2874. * @brief Memory Rx Transfer completed callback.
  2875. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2876. * the configuration information for the specified I2C.
  2877. * @retval None
  2878. */
  2879. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2880. {
  2881. /* Prevent unused argument(s) compilation warning */
  2882. UNUSED(hi2c);
  2883. /* NOTE : This function should not be modified, when the callback is needed,
  2884. the HAL_I2C_MemRxCpltCallback could be implemented in the user file
  2885. */
  2886. }
  2887. /**
  2888. * @brief I2C error callback.
  2889. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2890. * the configuration information for the specified I2C.
  2891. * @retval None
  2892. */
  2893. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  2894. {
  2895. /* Prevent unused argument(s) compilation warning */
  2896. UNUSED(hi2c);
  2897. /* NOTE : This function should not be modified, when the callback is needed,
  2898. the HAL_I2C_ErrorCallback could be implemented in the user file
  2899. */
  2900. }
  2901. /**
  2902. * @brief I2C abort callback.
  2903. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2904. * the configuration information for the specified I2C.
  2905. * @retval None
  2906. */
  2907. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  2908. {
  2909. /* Prevent unused argument(s) compilation warning */
  2910. UNUSED(hi2c);
  2911. /* NOTE : This function should not be modified, when the callback is needed,
  2912. the HAL_I2C_AbortCpltCallback could be implemented in the user file
  2913. */
  2914. }
  2915. /**
  2916. * @}
  2917. */
  2918. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  2919. * @brief Peripheral State, Mode and Error functions
  2920. *
  2921. @verbatim
  2922. ===============================================================================
  2923. ##### Peripheral State, Mode and Error functions #####
  2924. ===============================================================================
  2925. [..]
  2926. This subsection permit to get in run-time the status of the peripheral
  2927. and the data flow.
  2928. @endverbatim
  2929. * @{
  2930. */
  2931. /**
  2932. * @brief Return the I2C handle state.
  2933. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2934. * the configuration information for the specified I2C.
  2935. * @retval HAL state
  2936. */
  2937. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  2938. {
  2939. /* Return I2C handle state */
  2940. return hi2c->State;
  2941. }
  2942. /**
  2943. * @brief Returns the I2C Master, Slave, Memory or no mode.
  2944. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2945. * the configuration information for I2C module
  2946. * @retval HAL mode
  2947. */
  2948. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  2949. {
  2950. return hi2c->Mode;
  2951. }
  2952. /**
  2953. * @brief Return the I2C error code.
  2954. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2955. * the configuration information for the specified I2C.
  2956. * @retval I2C Error Code
  2957. */
  2958. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  2959. {
  2960. return hi2c->ErrorCode;
  2961. }
  2962. /**
  2963. * @}
  2964. */
  2965. /**
  2966. * @}
  2967. */
  2968. /** @addtogroup I2C_Private_Functions
  2969. * @{
  2970. */
  2971. /**
  2972. * @brief Handle TXE flag for Master
  2973. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2974. * the configuration information for I2C module
  2975. * @retval None
  2976. */
  2977. static void I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  2978. {
  2979. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  2980. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  2981. HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
  2982. uint32_t CurrentXferOptions = hi2c->XferOptions;
  2983. if ((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  2984. {
  2985. /* Call TxCpltCallback() directly if no stop mode is set */
  2986. if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  2987. {
  2988. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2989. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  2990. hi2c->Mode = HAL_I2C_MODE_NONE;
  2991. hi2c->State = HAL_I2C_STATE_READY;
  2992. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  2993. hi2c->MasterTxCpltCallback(hi2c);
  2994. #else
  2995. HAL_I2C_MasterTxCpltCallback(hi2c);
  2996. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  2997. }
  2998. else /* Generate Stop condition then Call TxCpltCallback() */
  2999. {
  3000. /* Disable EVT, BUF and ERR interrupt */
  3001. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3002. /* Generate Stop */
  3003. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3004. hi2c->PreviousState = I2C_STATE_NONE;
  3005. hi2c->State = HAL_I2C_STATE_READY;
  3006. if (hi2c->Mode == HAL_I2C_MODE_MEM)
  3007. {
  3008. hi2c->Mode = HAL_I2C_MODE_NONE;
  3009. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3010. hi2c->MemTxCpltCallback(hi2c);
  3011. #else
  3012. HAL_I2C_MemTxCpltCallback(hi2c);
  3013. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3014. }
  3015. else
  3016. {
  3017. hi2c->Mode = HAL_I2C_MODE_NONE;
  3018. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3019. hi2c->MasterTxCpltCallback(hi2c);
  3020. #else
  3021. HAL_I2C_MasterTxCpltCallback(hi2c);
  3022. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3023. }
  3024. }
  3025. }
  3026. else if ((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  3027. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  3028. {
  3029. if (hi2c->XferCount == 0U)
  3030. {
  3031. /* Disable BUF interrupt */
  3032. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3033. }
  3034. else
  3035. {
  3036. if (hi2c->Mode == HAL_I2C_MODE_MEM)
  3037. {
  3038. if (hi2c->EventCount == 0U)
  3039. {
  3040. /* If Memory address size is 8Bit */
  3041. if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3042. {
  3043. /* Send Memory Address */
  3044. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3045. hi2c->EventCount += 2U;
  3046. }
  3047. /* If Memory address size is 16Bit */
  3048. else
  3049. {
  3050. /* Send MSB of Memory Address */
  3051. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3052. hi2c->EventCount++;
  3053. }
  3054. }
  3055. else if (hi2c->EventCount == 1U)
  3056. {
  3057. /* Send LSB of Memory Address */
  3058. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3059. hi2c->EventCount++;
  3060. }
  3061. else if (hi2c->EventCount == 2U)
  3062. {
  3063. if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3064. {
  3065. /* Generate Restart */
  3066. hi2c->Instance->CR1 |= I2C_CR1_START;
  3067. }
  3068. else if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3069. {
  3070. /* Write data to DR */
  3071. hi2c->Instance->DR = *hi2c->pBuffPtr;
  3072. /* Increment Buffer pointer */
  3073. hi2c->pBuffPtr++;
  3074. /* Update counter */
  3075. hi2c->XferCount--;
  3076. }
  3077. else
  3078. {
  3079. /* Do nothing */
  3080. }
  3081. }
  3082. else
  3083. {
  3084. /* Do nothing */
  3085. }
  3086. }
  3087. else
  3088. {
  3089. /* Write data to DR */
  3090. hi2c->Instance->DR = *hi2c->pBuffPtr;
  3091. /* Increment Buffer pointer */
  3092. hi2c->pBuffPtr++;
  3093. /* Update counter */
  3094. hi2c->XferCount--;
  3095. }
  3096. }
  3097. }
  3098. else
  3099. {
  3100. /* Do nothing */
  3101. }
  3102. }
  3103. /**
  3104. * @brief Handle BTF flag for Master transmitter
  3105. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3106. * the configuration information for I2C module
  3107. * @retval None
  3108. */
  3109. static void I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3110. {
  3111. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3112. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3113. if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3114. {
  3115. if (hi2c->XferCount != 0U)
  3116. {
  3117. /* Write data to DR */
  3118. hi2c->Instance->DR = *hi2c->pBuffPtr;
  3119. /* Increment Buffer pointer */
  3120. hi2c->pBuffPtr++;
  3121. /* Update counter */
  3122. hi2c->XferCount--;
  3123. }
  3124. else
  3125. {
  3126. /* Call TxCpltCallback() directly if no stop mode is set */
  3127. if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3128. {
  3129. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3130. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3131. hi2c->Mode = HAL_I2C_MODE_NONE;
  3132. hi2c->State = HAL_I2C_STATE_READY;
  3133. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3134. hi2c->MasterTxCpltCallback(hi2c);
  3135. #else
  3136. HAL_I2C_MasterTxCpltCallback(hi2c);
  3137. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3138. }
  3139. else /* Generate Stop condition then Call TxCpltCallback() */
  3140. {
  3141. /* Disable EVT, BUF and ERR interrupt */
  3142. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3143. /* Generate Stop */
  3144. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3145. hi2c->PreviousState = I2C_STATE_NONE;
  3146. hi2c->State = HAL_I2C_STATE_READY;
  3147. if (hi2c->Mode == HAL_I2C_MODE_MEM)
  3148. {
  3149. hi2c->Mode = HAL_I2C_MODE_NONE;
  3150. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3151. hi2c->MemTxCpltCallback(hi2c);
  3152. #else
  3153. HAL_I2C_MemTxCpltCallback(hi2c);
  3154. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3155. }
  3156. else
  3157. {
  3158. hi2c->Mode = HAL_I2C_MODE_NONE;
  3159. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3160. hi2c->MasterTxCpltCallback(hi2c);
  3161. #else
  3162. HAL_I2C_MasterTxCpltCallback(hi2c);
  3163. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3164. }
  3165. }
  3166. }
  3167. }
  3168. }
  3169. /**
  3170. * @brief Handle RXNE flag for Master
  3171. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3172. * the configuration information for I2C module
  3173. * @retval None
  3174. */
  3175. static void I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3176. {
  3177. if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3178. {
  3179. uint32_t tmp;
  3180. tmp = hi2c->XferCount;
  3181. if (tmp > 3U)
  3182. {
  3183. /* Read data from DR */
  3184. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3185. /* Increment Buffer pointer */
  3186. hi2c->pBuffPtr++;
  3187. /* Update counter */
  3188. hi2c->XferCount--;
  3189. if (hi2c->XferCount == (uint16_t)3)
  3190. {
  3191. /* Disable BUF interrupt, this help to treat correctly the last 4 bytes
  3192. on BTF subroutine */
  3193. /* Disable BUF interrupt */
  3194. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3195. }
  3196. }
  3197. else if ((hi2c->XferOptions != I2C_FIRST_AND_NEXT_FRAME) && ((tmp == 1U) || (tmp == 0U)))
  3198. {
  3199. /* Disable Acknowledge */
  3200. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3201. /* Disable EVT, BUF and ERR interrupt */
  3202. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3203. /* Read data from DR */
  3204. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3205. /* Increment Buffer pointer */
  3206. hi2c->pBuffPtr++;
  3207. /* Update counter */
  3208. hi2c->XferCount--;
  3209. hi2c->State = HAL_I2C_STATE_READY;
  3210. if (hi2c->Mode == HAL_I2C_MODE_MEM)
  3211. {
  3212. hi2c->Mode = HAL_I2C_MODE_NONE;
  3213. hi2c->PreviousState = I2C_STATE_NONE;
  3214. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3215. hi2c->MemRxCpltCallback(hi2c);
  3216. #else
  3217. HAL_I2C_MemRxCpltCallback(hi2c);
  3218. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3219. }
  3220. else
  3221. {
  3222. hi2c->Mode = HAL_I2C_MODE_NONE;
  3223. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  3224. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3225. hi2c->MasterRxCpltCallback(hi2c);
  3226. #else
  3227. HAL_I2C_MasterRxCpltCallback(hi2c);
  3228. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3229. }
  3230. }
  3231. else
  3232. {
  3233. /* Do nothing */
  3234. }
  3235. }
  3236. }
  3237. /**
  3238. * @brief Handle BTF flag for Master receiver
  3239. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3240. * the configuration information for I2C module
  3241. * @retval None
  3242. */
  3243. static void I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  3244. {
  3245. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3246. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3247. if (hi2c->XferCount == 4U)
  3248. {
  3249. /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  3250. on BTF subroutine if there is a reception delay between N-1 and N byte */
  3251. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3252. /* Read data from DR */
  3253. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3254. /* Increment Buffer pointer */
  3255. hi2c->pBuffPtr++;
  3256. /* Update counter */
  3257. hi2c->XferCount--;
  3258. }
  3259. else if (hi2c->XferCount == 3U)
  3260. {
  3261. /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  3262. on BTF subroutine if there is a reception delay between N-1 and N byte */
  3263. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3264. if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME))
  3265. {
  3266. /* Disable Acknowledge */
  3267. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3268. }
  3269. /* Read data from DR */
  3270. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3271. /* Increment Buffer pointer */
  3272. hi2c->pBuffPtr++;
  3273. /* Update counter */
  3274. hi2c->XferCount--;
  3275. }
  3276. else if (hi2c->XferCount == 2U)
  3277. {
  3278. /* Prepare next transfer or stop current transfer */
  3279. if ((CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME_NO_STOP))
  3280. {
  3281. /* Disable Acknowledge */
  3282. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3283. }
  3284. else if ((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_AND_NEXT_FRAME))
  3285. {
  3286. /* Enable Acknowledge */
  3287. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3288. }
  3289. else if (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP)
  3290. {
  3291. /* Generate Stop */
  3292. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3293. }
  3294. else
  3295. {
  3296. /* Do nothing */
  3297. }
  3298. /* Read data from DR */
  3299. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3300. /* Increment Buffer pointer */
  3301. hi2c->pBuffPtr++;
  3302. /* Update counter */
  3303. hi2c->XferCount--;
  3304. /* Read data from DR */
  3305. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3306. /* Increment Buffer pointer */
  3307. hi2c->pBuffPtr++;
  3308. /* Update counter */
  3309. hi2c->XferCount--;
  3310. /* Disable EVT and ERR interrupt */
  3311. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3312. hi2c->State = HAL_I2C_STATE_READY;
  3313. if (hi2c->Mode == HAL_I2C_MODE_MEM)
  3314. {
  3315. hi2c->Mode = HAL_I2C_MODE_NONE;
  3316. hi2c->PreviousState = I2C_STATE_NONE;
  3317. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3318. hi2c->MemRxCpltCallback(hi2c);
  3319. #else
  3320. HAL_I2C_MemRxCpltCallback(hi2c);
  3321. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3322. }
  3323. else
  3324. {
  3325. hi2c->Mode = HAL_I2C_MODE_NONE;
  3326. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
  3327. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3328. hi2c->MasterRxCpltCallback(hi2c);
  3329. #else
  3330. HAL_I2C_MasterRxCpltCallback(hi2c);
  3331. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3332. }
  3333. }
  3334. else
  3335. {
  3336. /* Read data from DR */
  3337. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3338. /* Increment Buffer pointer */
  3339. hi2c->pBuffPtr++;
  3340. /* Update counter */
  3341. hi2c->XferCount--;
  3342. }
  3343. }
  3344. /**
  3345. * @brief Handle SB flag for Master
  3346. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3347. * the configuration information for I2C module
  3348. * @retval None
  3349. */
  3350. static void I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  3351. {
  3352. if (hi2c->Mode == HAL_I2C_MODE_MEM)
  3353. {
  3354. if (hi2c->EventCount == 0U)
  3355. {
  3356. /* Send slave address */
  3357. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3358. }
  3359. else
  3360. {
  3361. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3362. }
  3363. }
  3364. else
  3365. {
  3366. /* Send slave 7 Bits address */
  3367. if (hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3368. {
  3369. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3370. }
  3371. else
  3372. {
  3373. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3374. }
  3375. }
  3376. }
  3377. /**
  3378. * @brief Handle ADD10 flag for Master
  3379. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3380. * the configuration information for I2C module
  3381. * @retval None
  3382. */
  3383. static void I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  3384. {
  3385. /* Send slave address */
  3386. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  3387. }
  3388. /**
  3389. * @brief Handle ADDR flag for Master
  3390. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3391. * the configuration information for I2C module
  3392. * @retval None
  3393. */
  3394. static void I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  3395. {
  3396. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3397. HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode;
  3398. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3399. uint32_t Prev_State = hi2c->PreviousState;
  3400. if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3401. {
  3402. if ((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  3403. {
  3404. /* Clear ADDR flag */
  3405. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3406. }
  3407. else
  3408. {
  3409. if (hi2c->XferCount == 0U)
  3410. {
  3411. /* Clear ADDR flag */
  3412. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3413. /* Generate Stop */
  3414. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3415. }
  3416. else if (hi2c->XferCount == 1U)
  3417. {
  3418. if (CurrentXferOptions == I2C_NO_OPTION_FRAME)
  3419. {
  3420. /* Disable Acknowledge */
  3421. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3422. /* Clear ADDR flag */
  3423. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3424. /* Generate Stop */
  3425. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3426. }
  3427. /* Prepare next transfer or stop current transfer */
  3428. else if ((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  3429. && ((Prev_State != I2C_STATE_MASTER_BUSY_RX) || (CurrentXferOptions == I2C_FIRST_FRAME)))
  3430. {
  3431. if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
  3432. {
  3433. /* Disable Acknowledge */
  3434. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3435. }
  3436. else
  3437. {
  3438. /* Enable Acknowledge */
  3439. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3440. }
  3441. /* Clear ADDR flag */
  3442. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3443. }
  3444. else
  3445. {
  3446. /* Disable Acknowledge */
  3447. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3448. /* Clear ADDR flag */
  3449. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3450. /* Generate Stop */
  3451. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  3452. }
  3453. }
  3454. else if (hi2c->XferCount == 2U)
  3455. {
  3456. if ((CurrentXferOptions != I2C_NEXT_FRAME) && (CurrentXferOptions != I2C_FIRST_AND_NEXT_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME_NO_STOP))
  3457. {
  3458. /* Enable Pos */
  3459. SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS);
  3460. /* Clear ADDR flag */
  3461. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3462. /* Disable Acknowledge */
  3463. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3464. }
  3465. else
  3466. {
  3467. /* Enable Acknowledge */
  3468. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3469. /* Clear ADDR flag */
  3470. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3471. }
  3472. }
  3473. else
  3474. {
  3475. /* Enable Acknowledge */
  3476. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3477. /* Clear ADDR flag */
  3478. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3479. }
  3480. /* Reset Event counter */
  3481. hi2c->EventCount = 0U;
  3482. }
  3483. }
  3484. else
  3485. {
  3486. /* Clear ADDR flag */
  3487. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3488. }
  3489. }
  3490. /**
  3491. * @brief Handle TXE flag for Slave
  3492. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3493. * the configuration information for I2C module
  3494. * @retval None
  3495. */
  3496. static void I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3497. {
  3498. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3499. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  3500. if (hi2c->XferCount != 0U)
  3501. {
  3502. /* Write data to DR */
  3503. hi2c->Instance->DR = *hi2c->pBuffPtr;
  3504. /* Increment Buffer pointer */
  3505. hi2c->pBuffPtr++;
  3506. /* Update counter */
  3507. hi2c->XferCount--;
  3508. if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3509. {
  3510. /* Last Byte is received, disable Interrupt */
  3511. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3512. /* Set state at HAL_I2C_STATE_LISTEN */
  3513. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3514. hi2c->State = HAL_I2C_STATE_LISTEN;
  3515. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3516. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3517. hi2c->SlaveTxCpltCallback(hi2c);
  3518. #else
  3519. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3520. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3521. }
  3522. }
  3523. }
  3524. /**
  3525. * @brief Handle BTF flag for Slave transmitter
  3526. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3527. * the configuration information for I2C module
  3528. * @retval None
  3529. */
  3530. static void I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3531. {
  3532. if (hi2c->XferCount != 0U)
  3533. {
  3534. /* Write data to DR */
  3535. hi2c->Instance->DR = *hi2c->pBuffPtr;
  3536. /* Increment Buffer pointer */
  3537. hi2c->pBuffPtr++;
  3538. /* Update counter */
  3539. hi2c->XferCount--;
  3540. }
  3541. }
  3542. /**
  3543. * @brief Handle RXNE flag for Slave
  3544. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3545. * the configuration information for I2C module
  3546. * @retval None
  3547. */
  3548. static void I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3549. {
  3550. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3551. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  3552. if (hi2c->XferCount != 0U)
  3553. {
  3554. /* Read data from DR */
  3555. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3556. /* Increment Buffer pointer */
  3557. hi2c->pBuffPtr++;
  3558. /* Update counter */
  3559. hi2c->XferCount--;
  3560. if ((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3561. {
  3562. /* Last Byte is received, disable Interrupt */
  3563. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3564. /* Set state at HAL_I2C_STATE_LISTEN */
  3565. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  3566. hi2c->State = HAL_I2C_STATE_LISTEN;
  3567. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3568. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3569. hi2c->SlaveRxCpltCallback(hi2c);
  3570. #else
  3571. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3572. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3573. }
  3574. }
  3575. }
  3576. /**
  3577. * @brief Handle BTF flag for Slave receiver
  3578. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3579. * the configuration information for I2C module
  3580. * @retval None
  3581. */
  3582. static void I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  3583. {
  3584. if (hi2c->XferCount != 0U)
  3585. {
  3586. /* Read data from DR */
  3587. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3588. /* Increment Buffer pointer */
  3589. hi2c->pBuffPtr++;
  3590. /* Update counter */
  3591. hi2c->XferCount--;
  3592. }
  3593. }
  3594. /**
  3595. * @brief Handle ADD flag for Slave
  3596. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3597. * the configuration information for I2C module
  3598. * @param IT2Flags Interrupt2 flags to handle.
  3599. * @retval None
  3600. */
  3601. static void I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c, uint32_t IT2Flags)
  3602. {
  3603. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3604. uint16_t SlaveAddrCode=0;
  3605. if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  3606. {
  3607. /* Disable BUF interrupt, BUF enabling is manage through slave specific interface */
  3608. __HAL_I2C_DISABLE_IT(hi2c, (I2C_IT_BUF));
  3609. /* Transfer Direction requested by Master */
  3610. if (I2C_CHECK_FLAG(IT2Flags, I2C_FLAG_TRA) == RESET)
  3611. {
  3612. TransferDirection = I2C_DIRECTION_TRANSMIT;
  3613. }
  3614. /* Process Unlocked */
  3615. __HAL_UNLOCK(hi2c);
  3616. /* Call Slave Addr callback */
  3617. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3618. hi2c->AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3619. #else
  3620. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3621. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3622. }
  3623. else
  3624. {
  3625. /* Clear ADDR flag */
  3626. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
  3627. /* Process Unlocked */
  3628. __HAL_UNLOCK(hi2c);
  3629. }
  3630. }
  3631. /**
  3632. * @brief Handle STOPF flag for Slave
  3633. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3634. * the configuration information for I2C module
  3635. * @retval None
  3636. */
  3637. static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  3638. {
  3639. HAL_I2C_ModeTypeDef tmp1;
  3640. uint32_t tmp2;
  3641. HAL_I2C_StateTypeDef tmp3;
  3642. uint32_t tmp4;
  3643. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3644. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  3645. tmp1 = hi2c->Mode;
  3646. tmp2 = hi2c->XferCount;
  3647. tmp3 = hi2c->State;
  3648. tmp4 = hi2c->PreviousState;
  3649. if ((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  3650. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  3651. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  3652. {
  3653. /* The processing process ends at HAL_I2C_ER_IRQHandler function */
  3654. /* Disable EVT, BUF interrupt */
  3655. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF);
  3656. }
  3657. else
  3658. {
  3659. /* Disable EVT, BUF and ERR interrupt */
  3660. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3661. }
  3662. /* Clear STOPF flag */
  3663. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3664. /* Disable Acknowledge */
  3665. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3666. /* All data are not transferred, so set error code accordingly */
  3667. if (hi2c->XferCount != 0U)
  3668. {
  3669. /* Store Last receive data if any */
  3670. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  3671. {
  3672. /* Read data from DR */
  3673. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3674. /* Increment Buffer pointer */
  3675. hi2c->pBuffPtr++;
  3676. /* Update counter */
  3677. hi2c->XferCount--;
  3678. }
  3679. /* Store Last receive data if any */
  3680. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3681. {
  3682. /* Read data from DR */
  3683. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3684. /* Increment Buffer pointer */
  3685. hi2c->pBuffPtr++;
  3686. /* Update counter */
  3687. hi2c->XferCount--;
  3688. }
  3689. if (hi2c->XferCount != 0U)
  3690. {
  3691. /* Set ErrorCode corresponding to a Non-Acknowledge */
  3692. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  3693. }
  3694. }
  3695. if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3696. {
  3697. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3698. I2C_ITError(hi2c);
  3699. }
  3700. else
  3701. {
  3702. if (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN)
  3703. {
  3704. /* Set state at HAL_I2C_STATE_LISTEN */
  3705. hi2c->PreviousState = I2C_STATE_NONE;
  3706. hi2c->State = HAL_I2C_STATE_LISTEN;
  3707. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3708. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3709. hi2c->SlaveRxCpltCallback(hi2c);
  3710. #else
  3711. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3712. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3713. }
  3714. if (hi2c->State == HAL_I2C_STATE_LISTEN)
  3715. {
  3716. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3717. hi2c->PreviousState = I2C_STATE_NONE;
  3718. hi2c->State = HAL_I2C_STATE_READY;
  3719. hi2c->Mode = HAL_I2C_MODE_NONE;
  3720. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3721. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3722. hi2c->ListenCpltCallback(hi2c);
  3723. #else
  3724. HAL_I2C_ListenCpltCallback(hi2c);
  3725. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3726. }
  3727. else
  3728. {
  3729. if ((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3730. {
  3731. hi2c->PreviousState = I2C_STATE_NONE;
  3732. hi2c->State = HAL_I2C_STATE_READY;
  3733. hi2c->Mode = HAL_I2C_MODE_NONE;
  3734. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3735. hi2c->SlaveRxCpltCallback(hi2c);
  3736. #else
  3737. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3738. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3739. }
  3740. }
  3741. }
  3742. }
  3743. /**
  3744. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3745. * the configuration information for I2C module
  3746. * @retval None
  3747. */
  3748. static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  3749. {
  3750. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3751. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  3752. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3753. if (((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  3754. (CurrentState == HAL_I2C_STATE_LISTEN))
  3755. {
  3756. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3757. /* Disable EVT, BUF and ERR interrupt */
  3758. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3759. /* Clear AF flag */
  3760. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3761. /* Disable Acknowledge */
  3762. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3763. hi2c->PreviousState = I2C_STATE_NONE;
  3764. hi2c->State = HAL_I2C_STATE_READY;
  3765. hi2c->Mode = HAL_I2C_MODE_NONE;
  3766. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3767. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3768. hi2c->ListenCpltCallback(hi2c);
  3769. #else
  3770. HAL_I2C_ListenCpltCallback(hi2c);
  3771. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3772. }
  3773. else if (CurrentState == HAL_I2C_STATE_BUSY_TX)
  3774. {
  3775. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3776. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3777. hi2c->State = HAL_I2C_STATE_READY;
  3778. hi2c->Mode = HAL_I2C_MODE_NONE;
  3779. /* Disable EVT, BUF and ERR interrupt */
  3780. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3781. /* Clear AF flag */
  3782. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3783. /* Disable Acknowledge */
  3784. CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3785. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3786. hi2c->SlaveTxCpltCallback(hi2c);
  3787. #else
  3788. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3789. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3790. }
  3791. else
  3792. {
  3793. /* Clear AF flag only */
  3794. /* State Listen, but XferOptions == FIRST or NEXT */
  3795. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3796. }
  3797. }
  3798. /**
  3799. * @brief I2C interrupts error process
  3800. * @param hi2c I2C handle.
  3801. * @retval None
  3802. */
  3803. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  3804. {
  3805. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3806. HAL_I2C_StateTypeDef CurrentState = hi2c->State;
  3807. if ((hi2c->Mode == HAL_I2C_MODE_MASTER) && (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3808. {
  3809. /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  3810. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  3811. }
  3812. if (((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
  3813. {
  3814. /* keep HAL_I2C_STATE_LISTEN */
  3815. hi2c->PreviousState = I2C_STATE_NONE;
  3816. hi2c->State = HAL_I2C_STATE_LISTEN;
  3817. }
  3818. else
  3819. {
  3820. if (CurrentState != HAL_I2C_STATE_ABORT)
  3821. {
  3822. hi2c->State = HAL_I2C_STATE_READY;
  3823. }
  3824. hi2c->PreviousState = I2C_STATE_NONE;
  3825. hi2c->Mode = HAL_I2C_MODE_NONE;
  3826. }
  3827. if (hi2c->State == HAL_I2C_STATE_ABORT)
  3828. {
  3829. hi2c->State = HAL_I2C_STATE_READY;
  3830. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3831. /* Store Last receive data if any */
  3832. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3833. {
  3834. /* Read data from DR */
  3835. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3836. /* Increment Buffer pointer */
  3837. hi2c->pBuffPtr++;
  3838. }
  3839. /* Disable I2C peripheral to prevent dummy data in buffer */
  3840. __HAL_I2C_DISABLE(hi2c);
  3841. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3842. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3843. hi2c->AbortCpltCallback(hi2c);
  3844. #else
  3845. HAL_I2C_AbortCpltCallback(hi2c);
  3846. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3847. }
  3848. else
  3849. {
  3850. /* Store Last receive data if any */
  3851. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3852. {
  3853. /* Read data from DR */
  3854. *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->DR;
  3855. /* Increment Buffer pointer */
  3856. hi2c->pBuffPtr++;
  3857. }
  3858. /* Call user error callback */
  3859. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3860. hi2c->ErrorCallback(hi2c);
  3861. #else
  3862. HAL_I2C_ErrorCallback(hi2c);
  3863. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3864. }
  3865. /* STOP Flag is not set after a NACK reception */
  3866. /* So may inform upper layer that listen phase is stopped */
  3867. /* during NACK error treatment */
  3868. CurrentState = hi2c->State;
  3869. if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN))
  3870. {
  3871. /* Disable EVT, BUF and ERR interrupt */
  3872. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3873. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3874. hi2c->PreviousState = I2C_STATE_NONE;
  3875. hi2c->State = HAL_I2C_STATE_READY;
  3876. hi2c->Mode = HAL_I2C_MODE_NONE;
  3877. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3878. #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
  3879. hi2c->ListenCpltCallback(hi2c);
  3880. #else
  3881. HAL_I2C_ListenCpltCallback(hi2c);
  3882. #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
  3883. }
  3884. }
  3885. /**
  3886. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3887. * the configuration information for I2C module
  3888. * @param DevAddress Target device address: The device 7 bits address value
  3889. * in datasheet must be shifted to the left before calling the interface
  3890. * @param Timeout Timeout duration
  3891. * @param Tickstart Tick start value
  3892. * @retval HAL status
  3893. */
  3894. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  3895. {
  3896. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3897. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3898. /* Generate Start condition if first transfer */
  3899. if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3900. {
  3901. /* Generate Start */
  3902. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3903. }
  3904. else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  3905. {
  3906. /* Generate ReStart */
  3907. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3908. }
  3909. else
  3910. {
  3911. /* Do nothing */
  3912. }
  3913. /* Wait until SB flag is set */
  3914. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  3915. {
  3916. return HAL_ERROR;
  3917. }
  3918. /* Send slave address */
  3919. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  3920. /* Wait until ADDR flag is set */
  3921. if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  3922. {
  3923. return HAL_ERROR;
  3924. }
  3925. return HAL_OK;
  3926. }
  3927. /**
  3928. * @brief Master sends target device address for read request.
  3929. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3930. * the configuration information for I2C module
  3931. * @param DevAddress Target device address: The device 7 bits address value
  3932. * in datasheet must be shifted to the left before calling the interface
  3933. * @param Timeout Timeout duration
  3934. * @param Tickstart Tick start value
  3935. * @retval HAL status
  3936. */
  3937. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  3938. {
  3939. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3940. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3941. /* Enable Acknowledge */
  3942. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  3943. /* Generate Start condition if first transfer */
  3944. if ((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3945. {
  3946. /* Generate Start */
  3947. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3948. }
  3949. else if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  3950. {
  3951. /* Generate ReStart */
  3952. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3953. }
  3954. else
  3955. {
  3956. /* Do nothing */
  3957. }
  3958. /* Wait until SB flag is set */
  3959. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  3960. {
  3961. return HAL_ERROR;
  3962. }
  3963. /* Send slave address */
  3964. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  3965. /* Wait until ADDR flag is set */
  3966. if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  3967. {
  3968. return HAL_ERROR;
  3969. }
  3970. return HAL_OK;
  3971. }
  3972. /**
  3973. * @brief Master sends target device address followed by internal memory address for write request.
  3974. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3975. * the configuration information for I2C module
  3976. * @param DevAddress Target device address: The device 7 bits address value
  3977. * in datasheet must be shifted to the left before calling the interface
  3978. * @param MemAddress Internal memory address
  3979. * @param MemAddSize Size of internal memory address
  3980. * @param Timeout Timeout duration
  3981. * @param Tickstart Tick start value
  3982. * @retval HAL status
  3983. */
  3984. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  3985. {
  3986. /* Generate Start */
  3987. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  3988. /* Wait until SB flag is set */
  3989. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  3990. {
  3991. return HAL_ERROR;
  3992. }
  3993. /* Send slave address */
  3994. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  3995. /* Wait until ADDR flag is set */
  3996. if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  3997. {
  3998. return HAL_ERROR;
  3999. }
  4000. /* Clear ADDR flag */
  4001. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4002. /* Wait until TXE flag is set */
  4003. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4004. {
  4005. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4006. {
  4007. /* Generate Stop */
  4008. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4009. }
  4010. return HAL_ERROR;
  4011. }
  4012. /* If Memory address size is 8Bit */
  4013. if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4014. {
  4015. /* Send Memory Address */
  4016. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4017. }
  4018. /* If Memory address size is 16Bit */
  4019. else
  4020. {
  4021. /* Send MSB of Memory Address */
  4022. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4023. /* Wait until TXE flag is set */
  4024. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4025. {
  4026. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4027. {
  4028. /* Generate Stop */
  4029. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4030. }
  4031. return HAL_ERROR;
  4032. }
  4033. /* Send LSB of Memory Address */
  4034. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4035. /* Wait until ADDR flag is set */
  4036. }
  4037. if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_TXE, Timeout, Tickstart) != HAL_OK)
  4038. {
  4039. return HAL_ERROR;
  4040. }
  4041. return HAL_OK;
  4042. }
  4043. /**
  4044. * @brief Master sends target device address followed by internal memory address for read request.
  4045. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4046. * the configuration information for I2C module
  4047. * @param DevAddress Target device address: The device 7 bits address value
  4048. * in datasheet must be shifted to the left before calling the interface
  4049. * @param MemAddress Internal memory address
  4050. * @param MemAddSize Size of internal memory address
  4051. * @param Timeout Timeout duration
  4052. * @param Tickstart Tick start value
  4053. * @retval HAL status
  4054. */
  4055. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4056. {
  4057. /* Enable Acknowledge */
  4058. SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
  4059. /* Generate Start */
  4060. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  4061. /* Wait until SB flag is set */
  4062. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4063. {
  4064. return HAL_ERROR;
  4065. }
  4066. /* Send slave address */
  4067. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4068. /* Wait until ADDR flag is set */
  4069. if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4070. {
  4071. return HAL_ERROR;
  4072. }
  4073. /* Clear ADDR flag */
  4074. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4075. /* Wait until TXE flag is set */
  4076. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4077. {
  4078. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4079. {
  4080. /* Generate Stop */
  4081. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4082. }
  4083. return HAL_ERROR;
  4084. }
  4085. /* If Memory address size is 8Bit */
  4086. if (MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4087. {
  4088. /* Send Memory Address */
  4089. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4090. }
  4091. /* If Memory address size is 16Bit */
  4092. else
  4093. {
  4094. /* Send MSB of Memory Address */
  4095. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4096. /* Wait until TXE flag is set */
  4097. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4098. {
  4099. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4100. {
  4101. /* Generate Stop */
  4102. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4103. }
  4104. return HAL_ERROR;
  4105. }
  4106. /* Send LSB of Memory Address */
  4107. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4108. }
  4109. /* Wait until TXE flag is set */
  4110. if (I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4111. {
  4112. if (hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4113. {
  4114. /* Generate Stop */
  4115. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4116. }
  4117. return HAL_ERROR;
  4118. }
  4119. /* Generate Restart */
  4120. SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
  4121. /* Wait until SB flag is set */
  4122. if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4123. {
  4124. return HAL_ERROR;
  4125. }
  4126. /* Send slave address */
  4127. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4128. /* Wait until ADDR flag is set */
  4129. if (I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4130. {
  4131. return HAL_ERROR;
  4132. }
  4133. return HAL_OK;
  4134. }
  4135. /**
  4136. * @brief This function handles I2C Communication Timeout.
  4137. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4138. * the configuration information for I2C module
  4139. * @param Flag specifies the I2C flag to check.
  4140. * @param Status The new Flag status (SET or RESET).
  4141. * @param Timeout Timeout duration
  4142. * @param Tickstart Tick start value
  4143. * @retval HAL status
  4144. */
  4145. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  4146. {
  4147. /* Wait until flag is set */
  4148. while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status)
  4149. {
  4150. /* Check for the Timeout */
  4151. if (Timeout != HAL_MAX_DELAY)
  4152. {
  4153. if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  4154. {
  4155. hi2c->PreviousState = I2C_STATE_NONE;
  4156. hi2c->State = HAL_I2C_STATE_READY;
  4157. hi2c->Mode = HAL_I2C_MODE_NONE;
  4158. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4159. /* Process Unlocked */
  4160. __HAL_UNLOCK(hi2c);
  4161. return HAL_ERROR;
  4162. }
  4163. }
  4164. }
  4165. return HAL_OK;
  4166. }
  4167. /**
  4168. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  4169. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4170. * the configuration information for I2C module
  4171. * @param Flag specifies the I2C flag to check.
  4172. * @param Timeout Timeout duration
  4173. * @param Tickstart Tick start value
  4174. * @retval HAL status
  4175. */
  4176. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  4177. {
  4178. while (__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  4179. {
  4180. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4181. {
  4182. /* Generate Stop */
  4183. SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP);
  4184. /* Clear AF Flag */
  4185. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4186. hi2c->PreviousState = I2C_STATE_NONE;
  4187. hi2c->State = HAL_I2C_STATE_READY;
  4188. hi2c->Mode = HAL_I2C_MODE_NONE;
  4189. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  4190. /* Process Unlocked */
  4191. __HAL_UNLOCK(hi2c);
  4192. return HAL_ERROR;
  4193. }
  4194. /* Check for the Timeout */
  4195. if (Timeout != HAL_MAX_DELAY)
  4196. {
  4197. if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  4198. {
  4199. hi2c->PreviousState = I2C_STATE_NONE;
  4200. hi2c->State = HAL_I2C_STATE_READY;
  4201. hi2c->Mode = HAL_I2C_MODE_NONE;
  4202. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4203. /* Process Unlocked */
  4204. __HAL_UNLOCK(hi2c);
  4205. return HAL_ERROR;
  4206. }
  4207. }
  4208. }
  4209. return HAL_OK;
  4210. }
  4211. /**
  4212. * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
  4213. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4214. * the configuration information for the specified I2C.
  4215. * @param Timeout Timeout duration
  4216. * @param Tickstart Tick start value
  4217. * @retval HAL status
  4218. */
  4219. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4220. {
  4221. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  4222. {
  4223. /* Check if a NACK is detected */
  4224. if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4225. {
  4226. return HAL_ERROR;
  4227. }
  4228. /* Check for the Timeout */
  4229. if (Timeout != HAL_MAX_DELAY)
  4230. {
  4231. if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  4232. {
  4233. hi2c->PreviousState = I2C_STATE_NONE;
  4234. hi2c->State = HAL_I2C_STATE_READY;
  4235. hi2c->Mode = HAL_I2C_MODE_NONE;
  4236. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4237. /* Process Unlocked */
  4238. __HAL_UNLOCK(hi2c);
  4239. return HAL_ERROR;
  4240. }
  4241. }
  4242. }
  4243. return HAL_OK;
  4244. }
  4245. /**
  4246. * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
  4247. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4248. * the configuration information for the specified I2C.
  4249. * @param Timeout Timeout duration
  4250. * @param Tickstart Tick start value
  4251. * @retval HAL status
  4252. */
  4253. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4254. {
  4255. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  4256. {
  4257. /* Check if a NACK is detected */
  4258. if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4259. {
  4260. return HAL_ERROR;
  4261. }
  4262. /* Check for the Timeout */
  4263. if (Timeout != HAL_MAX_DELAY)
  4264. {
  4265. if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  4266. {
  4267. hi2c->PreviousState = I2C_STATE_NONE;
  4268. hi2c->State = HAL_I2C_STATE_READY;
  4269. hi2c->Mode = HAL_I2C_MODE_NONE;
  4270. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4271. /* Process Unlocked */
  4272. __HAL_UNLOCK(hi2c);
  4273. return HAL_ERROR;
  4274. }
  4275. }
  4276. }
  4277. return HAL_OK;
  4278. }
  4279. /**
  4280. * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
  4281. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4282. * the configuration information for the specified I2C.
  4283. * @param Timeout Timeout duration
  4284. * @param Tickstart Tick start value
  4285. * @retval HAL status
  4286. */
  4287. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4288. {
  4289. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  4290. {
  4291. /* Check if a NACK is detected */
  4292. if (I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4293. {
  4294. return HAL_ERROR;
  4295. }
  4296. /* Check for the Timeout */
  4297. if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  4298. {
  4299. hi2c->PreviousState = I2C_STATE_NONE;
  4300. hi2c->State = HAL_I2C_STATE_READY;
  4301. hi2c->Mode = HAL_I2C_MODE_NONE;
  4302. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4303. /* Process Unlocked */
  4304. __HAL_UNLOCK(hi2c);
  4305. return HAL_ERROR;
  4306. }
  4307. }
  4308. return HAL_OK;
  4309. }
  4310. /**
  4311. * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
  4312. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4313. * the configuration information for the specified I2C.
  4314. * @param Timeout Timeout duration
  4315. * @param Tickstart Tick start value
  4316. * @retval HAL status
  4317. */
  4318. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4319. {
  4320. while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  4321. {
  4322. /* Check if a STOPF is detected */
  4323. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  4324. {
  4325. /* Clear STOP Flag */
  4326. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  4327. hi2c->PreviousState = I2C_STATE_NONE;
  4328. hi2c->State = HAL_I2C_STATE_READY;
  4329. hi2c->Mode = HAL_I2C_MODE_NONE;
  4330. hi2c->ErrorCode |= HAL_I2C_ERROR_NONE;
  4331. /* Process Unlocked */
  4332. __HAL_UNLOCK(hi2c);
  4333. return HAL_ERROR;
  4334. }
  4335. /* Check for the Timeout */
  4336. if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
  4337. {
  4338. hi2c->PreviousState = I2C_STATE_NONE;
  4339. hi2c->State = HAL_I2C_STATE_READY;
  4340. hi2c->Mode = HAL_I2C_MODE_NONE;
  4341. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4342. /* Process Unlocked */
  4343. __HAL_UNLOCK(hi2c);
  4344. return HAL_ERROR;
  4345. }
  4346. }
  4347. return HAL_OK;
  4348. }
  4349. /**
  4350. * @brief This function handles Acknowledge failed detection during an I2C Communication.
  4351. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4352. * the configuration information for the specified I2C.
  4353. * @retval HAL status
  4354. */
  4355. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  4356. {
  4357. if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4358. {
  4359. /* Clear NACKF Flag */
  4360. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4361. hi2c->PreviousState = I2C_STATE_NONE;
  4362. hi2c->State = HAL_I2C_STATE_READY;
  4363. hi2c->Mode = HAL_I2C_MODE_NONE;
  4364. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  4365. /* Process Unlocked */
  4366. __HAL_UNLOCK(hi2c);
  4367. return HAL_ERROR;
  4368. }
  4369. return HAL_OK;
  4370. }
  4371. /**
  4372. * @brief Convert I2Cx OTHER_xxx XferOptions to functionnal XferOptions.
  4373. * @param hi2c I2C handle.
  4374. * @retval None
  4375. */
  4376. static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c)
  4377. {
  4378. /* if user set XferOptions to I2C_OTHER_FRAME */
  4379. /* it request implicitly to generate a restart condition */
  4380. /* set XferOptions to I2C_FIRST_FRAME */
  4381. if (hi2c->XferOptions == I2C_OTHER_FRAME)
  4382. {
  4383. hi2c->XferOptions = I2C_FIRST_FRAME;
  4384. }
  4385. /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */
  4386. /* it request implicitly to generate a restart condition */
  4387. /* then generate a stop condition at the end of transfer */
  4388. /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */
  4389. else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME)
  4390. {
  4391. hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME;
  4392. }
  4393. else
  4394. {
  4395. /* Nothing to do */
  4396. }
  4397. }
  4398. /**
  4399. * @}
  4400. */
  4401. #endif /* HAL_I2C_MODULE_ENABLED */
  4402. /**
  4403. * @}
  4404. */
  4405. /**
  4406. * @}
  4407. */
  4408. /************************ (C) COPYRIGHT Puya *****END OF FILE****/