py32f002b_hal_iwdg.c 8.8 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f002b_hal_iwdg.c
  4. * @author MCU Application Team
  5. * @brief IWDG HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Independent Watchdog (IWDG) peripheral:
  8. * + Initialization and Start functions
  9. * + IO operation functions
  10. *
  11. @verbatim
  12. ==============================================================================
  13. ##### IWDG Generic features #####
  14. ==============================================================================
  15. [..]
  16. (+) The IWDG can be started by either software or hardware (configurable
  17. through option byte).
  18. (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
  19. if the main clock fails.
  20. (+) Once the IWDG is started, the LSI is forced ON and both can not be
  21. disabled. The counter starts counting down from the reset value (0xFFF).
  22. When it reaches the end of count value (0x000) a reset signal is
  23. generated (IWDG reset).
  24. (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
  25. the IWDG_RLR value is reloaded in the counter and the watchdog reset is
  26. prevented.
  27. (+) The IWDG is implemented in the VDD voltage domain that is still functional
  28. in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
  29. IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
  30. reset occurs.
  31. (+) Debug mode : When the microcontroller enters debug mode (core halted),
  32. the IWDG counter either continues to work normally or stops, depending
  33. on DBG_IWDG_STOP configuration bit in DBG module, accessible through
  34. __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
  35. [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
  36. The IWDG timeout may vary due to LSI frequency dispersion. PY32F0xx
  37. devices provide the capability to measure the LSI frequency (LSI clock
  38. connected internally to TIM5 CH4 input capture). The measured value
  39. can be used to have an IWDG timeout with an acceptable accuracy.
  40. ##### How to use this driver #####
  41. ==============================================================================
  42. [..]
  43. (#) Use IWDG using HAL_IWDG_Init() function to :
  44. (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
  45. clock is forced ON and IWDG counter starts downcounting.
  46. (++) Enable write access to configuration register: IWDG_PR & IWDG_RLR.
  47. (++) Configure the IWDG prescaler and counter reload value. This reload
  48. value will be loaded in the IWDG counter each time the watchdog is
  49. reloaded, then the IWDG will start counting down from this value.
  50. (++) wait for status flags to be reset"
  51. (#) Then the application program must refresh the IWDG counter at regular
  52. intervals during normal operation to prevent an MCU reset, using
  53. HAL_IWDG_Refresh() function.
  54. *** IWDG HAL driver macros list ***
  55. ====================================
  56. [..]
  57. Below the list of most used macros in IWDG HAL driver:
  58. (+) __HAL_IWDG_START: Enable the IWDG peripheral
  59. (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
  60. the reload register
  61. @endverbatim
  62. ******************************************************************************
  63. * @attention
  64. *
  65. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  66. * All rights reserved.</center></h2>
  67. *
  68. * This software component is licensed by Puya under BSD 3-Clause license,
  69. * the "License"; You may not use this file except in compliance with the
  70. * License. You may obtain a copy of the License at:
  71. * opensource.org/licenses/BSD-3-Clause
  72. *
  73. ******************************************************************************
  74. * @attention
  75. *
  76. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  77. * All rights reserved.</center></h2>
  78. *
  79. * This software component is licensed by ST under BSD 3-Clause license,
  80. * the "License"; You may not use this file except in compliance with the
  81. * License. You may obtain a copy of the License at:
  82. * opensource.org/licenses/BSD-3-Clause
  83. *
  84. ******************************************************************************
  85. */
  86. /* Includes ------------------------------------------------------------------*/
  87. #include "py32f0xx_hal.h"
  88. /** @addtogroup PY32F002B_HAL_Driver
  89. * @{
  90. */
  91. #ifdef HAL_IWDG_MODULE_ENABLED
  92. /** @defgroup IWDG IWDG
  93. * @brief IWDG HAL module driver.
  94. * @{
  95. */
  96. /* Private typedef -----------------------------------------------------------*/
  97. /* Private define ------------------------------------------------------------*/
  98. /** @defgroup IWDG_Private_Defines IWDG Private Defines
  99. * @{
  100. */
  101. /* Status register need 5 RC LSI divided by prescaler clock to be updated. With
  102. higher prescaler (256), and according to HSI variation, we need to wait at
  103. least 6 cycles so 48 ms. */
  104. #define HAL_IWDG_DEFAULT_TIMEOUT 48U
  105. /**
  106. * @}
  107. */
  108. /* Private macro -------------------------------------------------------------*/
  109. /* Private variables ---------------------------------------------------------*/
  110. /* Private function prototypes -----------------------------------------------*/
  111. /* Exported functions --------------------------------------------------------*/
  112. /** @addtogroup IWDG_Exported_Functions
  113. * @{
  114. */
  115. /** @addtogroup IWDG_Exported_Functions_Group1
  116. * @brief Initialization and Start functions.
  117. *
  118. @verbatim
  119. ===============================================================================
  120. ##### Initialization and Start functions #####
  121. ===============================================================================
  122. [..] This section provides functions allowing to:
  123. (+) Initialize the IWDG according to the specified parameters in the
  124. IWDG_InitTypeDef of associated handle.
  125. (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
  126. is reloaded in order to exit function with correct time base.
  127. @endverbatim
  128. * @{
  129. */
  130. /**
  131. * @brief Initialize the IWDG according to the specified parameters in the
  132. * IWDG_InitTypeDef and start watchdog. Before exiting function,
  133. * watchdog is refreshed in order to have correct time base.
  134. * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
  135. * the configuration information for the specified IWDG module.
  136. * @retval HAL status
  137. */
  138. HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
  139. {
  140. uint32_t tickstart;
  141. /* Check the IWDG handle allocation */
  142. if (hiwdg == NULL)
  143. {
  144. return HAL_ERROR;
  145. }
  146. /* Check the parameters */
  147. assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
  148. assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
  149. assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
  150. /* Enable IWDG. LSI requires ready */
  151. __HAL_IWDG_START(hiwdg);
  152. /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */
  153. IWDG_ENABLE_WRITE_ACCESS(hiwdg);
  154. /* Write to IWDG registers the Prescaler & Reload values to work with */
  155. hiwdg->Instance->PR = hiwdg->Init.Prescaler;
  156. hiwdg->Instance->RLR = hiwdg->Init.Reload;
  157. /* Check pending flag, if previous update not done, return timeout */
  158. tickstart = HAL_GetTick();
  159. /* Wait for register to be updated */
  160. while (hiwdg->Instance->SR != RESET)
  161. {
  162. if ((HAL_GetTick() - tickstart) > HAL_IWDG_DEFAULT_TIMEOUT)
  163. {
  164. return HAL_TIMEOUT;
  165. }
  166. }
  167. /* Reload IWDG counter with value defined in the reload register */
  168. __HAL_IWDG_RELOAD_COUNTER(hiwdg);
  169. /* Return function status */
  170. return HAL_OK;
  171. }
  172. /**
  173. * @}
  174. */
  175. /** @addtogroup IWDG_Exported_Functions_Group2
  176. * @brief IO operation functions
  177. *
  178. @verbatim
  179. ===============================================================================
  180. ##### IO operation functions #####
  181. ===============================================================================
  182. [..] This section provides functions allowing to:
  183. (+) Refresh the IWDG.
  184. @endverbatim
  185. * @{
  186. */
  187. /**
  188. * @brief Refresh the IWDG.
  189. * @param hiwdg pointer to a IWDG_HandleTypeDef structure that contains
  190. * the configuration information for the specified IWDG module.
  191. * @retval HAL status
  192. */
  193. HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
  194. {
  195. /* Reload IWDG counter with value defined in the reload register */
  196. __HAL_IWDG_RELOAD_COUNTER(hiwdg);
  197. /* Return function status */
  198. return HAL_OK;
  199. }
  200. /**
  201. * @}
  202. */
  203. /**
  204. * @}
  205. */
  206. #endif /* HAL_IWDG_MODULE_ENABLED */
  207. /**
  208. * @}
  209. */
  210. /**
  211. * @}
  212. */
  213. /************************ (C) COPYRIGHT Puya *****END OF FILE****/