py32f002b_hal_spi.c 79 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f002b_hal_spi.c
  4. * @author MCU Application Team
  5. * @brief SPI HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Serial Peripheral Interface (SPI) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral Control functions
  11. * + Peripheral State functions
  12. *
  13. @verbatim
  14. ==============================================================================
  15. ##### How to use this driver #####
  16. ==============================================================================
  17. [..]
  18. The SPI HAL driver can be used as follows:
  19. (#) Declare a SPI_HandleTypeDef handle structure, for example:
  20. SPI_HandleTypeDef hspi;
  21. (#)Initialize the SPI low level resources by implementing the HAL_SPI_MspInit() API:
  22. (##) Enable the SPIx interface clock
  23. (##) SPI pins configuration
  24. (+++) Enable the clock for the SPI GPIOs
  25. (+++) Configure these SPI pins as alternate function push-pull
  26. (##) NVIC configuration if you need to use interrupt process
  27. (+++) Configure the SPIx interrupt priority
  28. (+++) Enable the NVIC SPI IRQ handle
  29. (#) Program the Mode, BidirectionalMode , Data size, Baudrate Prescaler, NSS
  30. management, Clock polarity and phase, FirstBit configuration in the hspi Init structure.
  31. (#) Initialize the SPI registers by calling the HAL_SPI_Init() API:
  32. (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  33. by calling the customized HAL_SPI_MspInit() API.
  34. [..]
  35. Master Receive mode restriction:
  36. (#) In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=1) or
  37. bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI
  38. does not initiate a new transfer the following procedure has to be respected:
  39. (##) HAL_SPI_DeInit()
  40. (##) HAL_SPI_Init()
  41. [..]
  42. Callback registration:
  43. (#) The compilation flag USE_HAL_SPI_REGISTER_CALLBACKS when set to 1U
  44. allows the user to configure dynamically the driver callbacks.
  45. Use Functions HAL_SPI_RegisterCallback() to register an interrupt callback.
  46. Function HAL_SPI_RegisterCallback() allows to register following callbacks:
  47. (++) TxCpltCallback : SPI Tx Completed callback
  48. (++) RxCpltCallback : SPI Rx Completed callback
  49. (++) TxRxCpltCallback : SPI TxRx Completed callback
  50. (++) TxHalfCpltCallback : SPI Tx Half Completed callback
  51. (++) RxHalfCpltCallback : SPI Rx Half Completed callback
  52. (++) TxRxHalfCpltCallback : SPI TxRx Half Completed callback
  53. (++) ErrorCallback : SPI Error callback
  54. (++) AbortCpltCallback : SPI Abort callback
  55. (++) MspInitCallback : SPI Msp Init callback
  56. (++) MspDeInitCallback : SPI Msp DeInit callback
  57. This function takes as parameters the HAL peripheral handle, the Callback ID
  58. and a pointer to the user callback function.
  59. (#) Use function HAL_SPI_UnRegisterCallback to reset a callback to the default
  60. weak function.
  61. HAL_SPI_UnRegisterCallback takes as parameters the HAL peripheral handle,
  62. and the Callback ID.
  63. This function allows to reset following callbacks:
  64. (++) TxCpltCallback : SPI Tx Completed callback
  65. (++) RxCpltCallback : SPI Rx Completed callback
  66. (++) TxRxCpltCallback : SPI TxRx Completed callback
  67. (++) TxHalfCpltCallback : SPI Tx Half Completed callback
  68. (++) RxHalfCpltCallback : SPI Rx Half Completed callback
  69. (++) TxRxHalfCpltCallback : SPI TxRx Half Completed callback
  70. (++) ErrorCallback : SPI Error callback
  71. (++) AbortCpltCallback : SPI Abort callback
  72. (++) MspInitCallback : SPI Msp Init callback
  73. (++) MspDeInitCallback : SPI Msp DeInit callback
  74. [..]
  75. By default, after the HAL_SPI_Init() and when the state is HAL_SPI_STATE_RESET
  76. all callbacks are set to the corresponding weak functions:
  77. examples HAL_SPI_MasterTxCpltCallback(), HAL_SPI_MasterRxCpltCallback().
  78. Exception done for MspInit and MspDeInit functions that are
  79. reset to the legacy weak functions in the HAL_SPI_Init()/ HAL_SPI_DeInit() only when
  80. these callbacks are null (not registered beforehand).
  81. If MspInit or MspDeInit are not null, the HAL_SPI_Init()/ HAL_SPI_DeInit()
  82. keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  83. [..]
  84. Callbacks can be registered/unregistered in HAL_SPI_STATE_READY state only.
  85. Exception done MspInit/MspDeInit functions that can be registered/unregistered
  86. in HAL_SPI_STATE_READY or HAL_SPI_STATE_RESET state,
  87. thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  88. Then, the user first registers the MspInit/MspDeInit user callbacks
  89. using HAL_SPI_RegisterCallback() before calling HAL_SPI_DeInit()
  90. or HAL_SPI_Init() function.
  91. [..]
  92. When the compilation define USE_HAL_PPP_REGISTER_CALLBACKS is set to 0 or
  93. not defined, the callback registering feature is not available
  94. and weak (surcharged) callbacks are used.
  95. [..]
  96. Using the HAL it is not possible to reach all supported SPI frequency with the different SPI Modes,
  97. the following table resume the max SPI frequency reached with data size 8bits/16bits,
  98. according to frequency of the APBx Peripheral Clock (fPCLK) used by the SPI instance.
  99. @endverbatim
  100. Additional table :
  101. DataSize = SPI_DATASIZE_8BIT:
  102. +----------------------------------------------------------------------------------------------+
  103. | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
  104. | Process | Transfer mode |---------------------|----------------------|----------------------|
  105. | | | Master | Slave | Master | Slave | Master | Slave |
  106. |==============================================================================================|
  107. | TX | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA |
  108. | / |----------------|----------|----------|-----------|----------|-----------|----------|
  109. | RX | Interrupt | Fpclk/4 | Fpclk/16 | NA | NA | NA | NA |
  110. | |----------------|----------|----------|-----------|----------|-----------|----------|
  111. |=========|================|==========|==========|===========|==========|===========|==========|
  112. | | Polling | Fpclk/4 | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/8 |
  113. | |----------------|----------|----------|-----------|----------|-----------|----------|
  114. | R | Interrupt | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/4 |
  115. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  116. |=========|================|==========|==========|===========|==========|===========|==========|
  117. | | Polling | Fpclk/8 | Fpclk/2 | NA | NA | Fpclk/8 | Fpclk/8 |
  118. | |----------------|----------|----------|-----------|----------|-----------|----------|
  119. | T | Interrupt | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/16 | Fpclk/8 |
  120. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  121. +----------------------------------------------------------------------------------------------+
  122. DataSize = SPI_DATASIZE_16BIT:
  123. +----------------------------------------------------------------------------------------------+
  124. | | | 2Lines Fullduplex | 2Lines RxOnly | 1Line |
  125. | Process | Transfer mode |---------------------|----------------------|----------------------|
  126. | | | Master | Slave | Master | Slave | Master | Slave |
  127. |==============================================================================================|
  128. | TX | Polling | Fpclk/4 | Fpclk/8 | NA | NA | NA | NA |
  129. | / |----------------|----------|----------|-----------|----------|-----------|----------|
  130. | RX | Interrupt | Fpclk/4 | Fpclk/16 | NA | NA | NA | NA |
  131. | |----------------|----------|----------|-----------|----------|-----------|----------|
  132. |=========|================|==========|==========|===========|==========|===========|==========|
  133. | | Polling | Fpclk/4 | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/8 |
  134. | |----------------|----------|----------|-----------|----------|-----------|----------|
  135. | R | Interrupt | Fpclk/8 | Fpclk/16 | Fpclk/8 | Fpclk/8 | Fpclk/8 | Fpclk/4 |
  136. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  137. |=========|================|==========|==========|===========|==========|===========|==========|
  138. | | Polling | Fpclk/8 | Fpclk/2 | NA | NA | Fpclk/8 | Fpclk/8 |
  139. | |----------------|----------|----------|-----------|----------|-----------|----------|
  140. | T | Interrupt | Fpclk/2 | Fpclk/4 | NA | NA | Fpclk/16 | Fpclk/8 |
  141. | X |----------------|----------|----------|-----------|----------|-----------|----------|
  142. +----------------------------------------------------------------------------------------------+
  143. @note The max SPI frequency depend on SPI data size (4bits, 5bits,..., 8bits,...15bits, 16bits),
  144. SPI mode(2 Lines fullduplex, 2 lines RxOnly, 1 line TX/RX) and Process mode (Polling, IT).
  145. @note
  146. (#) TX/RX processes are HAL_SPI_TransmitReceive(), HAL_SPI_TransmitReceive_IT()
  147. (#) RX processes are HAL_SPI_Receive(), HAL_SPI_Receive_IT()
  148. (#) TX processes are HAL_SPI_Transmit(), HAL_SPI_Transmit_IT()
  149. ******************************************************************************
  150. * @attention
  151. *
  152. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  153. * All rights reserved.</center></h2>
  154. *
  155. * This software component is licensed by Puya under BSD 3-Clause license,
  156. * the "License"; You may not use this file except in compliance with the
  157. * License. You may obtain a copy of the License at:
  158. * opensource.org/licenses/BSD-3-Clause
  159. *
  160. ******************************************************************************
  161. * @attention
  162. *
  163. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  164. * All rights reserved.</center></h2>
  165. *
  166. * This software component is licensed by ST under BSD 3-Clause license,
  167. * the "License"; You may not use this file except in compliance with the
  168. * License. You may obtain a copy of the License at:
  169. * opensource.org/licenses/BSD-3-Clause
  170. *
  171. ******************************************************************************
  172. */
  173. /* Includes ------------------------------------------------------------------*/
  174. #include "py32f0xx_hal.h"
  175. /** @addtogroup PY32F002B_HAL_Driver
  176. * @{
  177. */
  178. /** @defgroup SPI SPI
  179. * @brief SPI HAL module driver
  180. * @{
  181. */
  182. #ifdef HAL_SPI_MODULE_ENABLED
  183. /* Private typedef -----------------------------------------------------------*/
  184. /* Private defines -----------------------------------------------------------*/
  185. /** @defgroup SPI_Private_Constants SPI Private Constants
  186. * @{
  187. */
  188. #define SPI_DEFAULT_TIMEOUT 100U
  189. /**
  190. * @}
  191. */
  192. /* Private macros ------------------------------------------------------------*/
  193. /* Private variables ---------------------------------------------------------*/
  194. /* Private function prototypes -----------------------------------------------*/
  195. /** @defgroup SPI_Private_Functions SPI Private Functions
  196. * @{
  197. */
  198. static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
  199. uint32_t Timeout, uint32_t Tickstart);
  200. static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
  201. uint32_t Timeout, uint32_t Tickstart);
  202. static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  203. static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  204. static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  205. static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  206. static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  207. static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi);
  208. static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  209. static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi);
  210. static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi);
  211. static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi);
  212. static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi);
  213. static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi);
  214. static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi);
  215. static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
  216. static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart);
  217. /**
  218. * @}
  219. */
  220. /* Exported functions --------------------------------------------------------*/
  221. /** @defgroup SPI_Exported_Functions SPI Exported Functions
  222. * @{
  223. */
  224. /** @defgroup SPI_Exported_Functions_Group1 Initialization and de-initialization functions
  225. * @brief Initialization and Configuration functions
  226. *
  227. @verbatim
  228. ===============================================================================
  229. ##### Initialization and de-initialization functions #####
  230. ===============================================================================
  231. [..] This subsection provides a set of functions allowing to initialize and
  232. de-initialize the SPIx peripheral:
  233. (+) User must implement HAL_SPI_MspInit() function in which he configures
  234. all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
  235. (+) Call the function HAL_SPI_Init() to configure the selected device with
  236. the selected configuration:
  237. (++) Mode
  238. (++) Direction
  239. (++) Data Size
  240. (++) Clock Polarity and Phase
  241. (++) NSS Management
  242. (++) BaudRate Prescaler
  243. (++) FirstBit
  244. (++) FIFO reception threshold
  245. (+) Call the function HAL_SPI_DeInit() to restore the default configuration
  246. of the selected SPIx peripheral.
  247. @endverbatim
  248. * @{
  249. */
  250. /**
  251. * @brief Initialize the SPI according to the specified parameters
  252. * in the SPI_InitTypeDef and initialize the associated handle.
  253. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  254. * the configuration information for SPI module.
  255. * @retval HAL status
  256. */
  257. HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
  258. {
  259. /* Check the SPI handle allocation */
  260. if (hspi == NULL)
  261. {
  262. return HAL_ERROR;
  263. }
  264. /* Check the parameters */
  265. assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  266. assert_param(IS_SPI_MODE(hspi->Init.Mode));
  267. assert_param(IS_SPI_DIRECTION(hspi->Init.Direction));
  268. assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
  269. assert_param(IS_SPI_NSS(hspi->Init.NSS));
  270. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  271. assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
  272. assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
  273. assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
  274. if (hspi->Init.Mode == SPI_MODE_MASTER)
  275. {
  276. assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
  277. }
  278. else
  279. {
  280. /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
  281. hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
  282. }
  283. if (hspi->State == HAL_SPI_STATE_RESET)
  284. {
  285. /* Allocate lock resource and initialize it */
  286. hspi->Lock = HAL_UNLOCKED;
  287. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  288. /* Init the SPI Callback settings */
  289. hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback */
  290. hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback */
  291. hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */
  292. hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
  293. hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
  294. hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */
  295. hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback */
  296. hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
  297. if (hspi->MspInitCallback == NULL)
  298. {
  299. hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */
  300. }
  301. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  302. hspi->MspInitCallback(hspi);
  303. #else
  304. /* Init the low level hardware : GPIO, CLOCK, NVIC... */
  305. HAL_SPI_MspInit(hspi);
  306. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  307. }
  308. hspi->State = HAL_SPI_STATE_BUSY;
  309. /* Disable the selected SPI peripheral */
  310. __HAL_SPI_DISABLE(hspi);
  311. /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
  312. /* Configure : SPI Mode, Communication Mode, Clock polarity and phase, NSS management,
  313. Communication speed, First bit */
  314. WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
  315. (hspi->Init.Direction & (SPI_CR1_RXONLY | SPI_CR1_BIDIMODE)) |
  316. (hspi->Init.CLKPolarity & SPI_CR1_CPOL) |
  317. (hspi->Init.CLKPhase & SPI_CR1_CPHA) |
  318. (hspi->Init.NSS & SPI_CR1_SSM) |
  319. (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
  320. (hspi->Init.DataSize & SPI_CR1_DFF_Msk) |
  321. (hspi->Init.FirstBit & SPI_CR1_LSBFIRST)));
  322. /* Configure : NSS management */
  323. WRITE_REG(hspi->Instance->CR2, ((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE));
  324. #if defined(SPI_I2SCFGR_I2SMOD)
  325. /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
  326. CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
  327. #endif /* SPI_I2SCFGR_I2SMOD */
  328. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  329. hspi->State = HAL_SPI_STATE_READY;
  330. return HAL_OK;
  331. }
  332. /**
  333. * @brief De-Initialize the SPI peripheral.
  334. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  335. * the configuration information for SPI module.
  336. * @retval HAL status
  337. */
  338. HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
  339. {
  340. /* Check the SPI handle allocation */
  341. if (hspi == NULL)
  342. {
  343. return HAL_ERROR;
  344. }
  345. /* Check SPI Instance parameter */
  346. assert_param(IS_SPI_ALL_INSTANCE(hspi->Instance));
  347. hspi->State = HAL_SPI_STATE_BUSY;
  348. /* Disable the SPI Peripheral Clock */
  349. __HAL_SPI_DISABLE(hspi);
  350. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  351. if (hspi->MspDeInitCallback == NULL)
  352. {
  353. hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */
  354. }
  355. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  356. hspi->MspDeInitCallback(hspi);
  357. #else
  358. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  359. HAL_SPI_MspDeInit(hspi);
  360. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  361. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  362. hspi->State = HAL_SPI_STATE_RESET;
  363. /* Release Lock */
  364. __HAL_UNLOCK(hspi);
  365. return HAL_OK;
  366. }
  367. /**
  368. * @brief Initialize the SPI MSP.
  369. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  370. * the configuration information for SPI module.
  371. * @retval None
  372. */
  373. __weak void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
  374. {
  375. /* Prevent unused argument(s) compilation warning */
  376. UNUSED(hspi);
  377. /* NOTE : This function should not be modified, when the callback is needed,
  378. the HAL_SPI_MspInit should be implemented in the user file
  379. */
  380. }
  381. /**
  382. * @brief De-Initialize the SPI MSP.
  383. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  384. * the configuration information for SPI module.
  385. * @retval None
  386. */
  387. __weak void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi)
  388. {
  389. /* Prevent unused argument(s) compilation warning */
  390. UNUSED(hspi);
  391. /* NOTE : This function should not be modified, when the callback is needed,
  392. the HAL_SPI_MspDeInit should be implemented in the user file
  393. */
  394. }
  395. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  396. /**
  397. * @brief Register a User SPI Callback
  398. * To be used instead of the weak predefined callback
  399. * @param hspi Pointer to a SPI_HandleTypeDef structure that contains
  400. * the configuration information for the specified SPI.
  401. * @param CallbackID ID of the callback to be registered
  402. * @param pCallback pointer to the Callback function
  403. * @retval HAL status
  404. */
  405. HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID,
  406. pSPI_CallbackTypeDef pCallback)
  407. {
  408. HAL_StatusTypeDef status = HAL_OK;
  409. if (pCallback == NULL)
  410. {
  411. /* Update the error code */
  412. hspi->ErrorCode |= HAL_SPI_ERROR_INVALID_CALLBACK;
  413. return HAL_ERROR;
  414. }
  415. /* Process locked */
  416. __HAL_LOCK(hspi);
  417. if (HAL_SPI_STATE_READY == hspi->State)
  418. {
  419. switch (CallbackID)
  420. {
  421. case HAL_SPI_TX_COMPLETE_CB_ID :
  422. hspi->TxCpltCallback = pCallback;
  423. break;
  424. case HAL_SPI_RX_COMPLETE_CB_ID :
  425. hspi->RxCpltCallback = pCallback;
  426. break;
  427. case HAL_SPI_TX_RX_COMPLETE_CB_ID :
  428. hspi->TxRxCpltCallback = pCallback;
  429. break;
  430. case HAL_SPI_TX_HALF_COMPLETE_CB_ID :
  431. hspi->TxHalfCpltCallback = pCallback;
  432. break;
  433. case HAL_SPI_RX_HALF_COMPLETE_CB_ID :
  434. hspi->RxHalfCpltCallback = pCallback;
  435. break;
  436. case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID :
  437. hspi->TxRxHalfCpltCallback = pCallback;
  438. break;
  439. case HAL_SPI_ERROR_CB_ID :
  440. hspi->ErrorCallback = pCallback;
  441. break;
  442. case HAL_SPI_ABORT_CB_ID :
  443. hspi->AbortCpltCallback = pCallback;
  444. break;
  445. case HAL_SPI_MSPINIT_CB_ID :
  446. hspi->MspInitCallback = pCallback;
  447. break;
  448. case HAL_SPI_MSPDEINIT_CB_ID :
  449. hspi->MspDeInitCallback = pCallback;
  450. break;
  451. default :
  452. /* Update the error code */
  453. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  454. /* Return error status */
  455. status = HAL_ERROR;
  456. break;
  457. }
  458. }
  459. else if (HAL_SPI_STATE_RESET == hspi->State)
  460. {
  461. switch (CallbackID)
  462. {
  463. case HAL_SPI_MSPINIT_CB_ID :
  464. hspi->MspInitCallback = pCallback;
  465. break;
  466. case HAL_SPI_MSPDEINIT_CB_ID :
  467. hspi->MspDeInitCallback = pCallback;
  468. break;
  469. default :
  470. /* Update the error code */
  471. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  472. /* Return error status */
  473. status = HAL_ERROR;
  474. break;
  475. }
  476. }
  477. else
  478. {
  479. /* Update the error code */
  480. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  481. /* Return error status */
  482. status = HAL_ERROR;
  483. }
  484. /* Release Lock */
  485. __HAL_UNLOCK(hspi);
  486. return status;
  487. }
  488. /**
  489. * @brief Unregister an SPI Callback
  490. * SPI callback is redirected to the weak predefined callback
  491. * @param hspi Pointer to a SPI_HandleTypeDef structure that contains
  492. * the configuration information for the specified SPI.
  493. * @param CallbackID ID of the callback to be unregistered
  494. * @retval HAL status
  495. */
  496. HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID)
  497. {
  498. HAL_StatusTypeDef status = HAL_OK;
  499. /* Process locked */
  500. __HAL_LOCK(hspi);
  501. if (HAL_SPI_STATE_READY == hspi->State)
  502. {
  503. switch (CallbackID)
  504. {
  505. case HAL_SPI_TX_COMPLETE_CB_ID :
  506. hspi->TxCpltCallback = HAL_SPI_TxCpltCallback; /* Legacy weak TxCpltCallback */
  507. break;
  508. case HAL_SPI_RX_COMPLETE_CB_ID :
  509. hspi->RxCpltCallback = HAL_SPI_RxCpltCallback; /* Legacy weak RxCpltCallback */
  510. break;
  511. case HAL_SPI_TX_RX_COMPLETE_CB_ID :
  512. hspi->TxRxCpltCallback = HAL_SPI_TxRxCpltCallback; /* Legacy weak TxRxCpltCallback */
  513. break;
  514. case HAL_SPI_TX_HALF_COMPLETE_CB_ID :
  515. hspi->TxHalfCpltCallback = HAL_SPI_TxHalfCpltCallback; /* Legacy weak TxHalfCpltCallback */
  516. break;
  517. case HAL_SPI_RX_HALF_COMPLETE_CB_ID :
  518. hspi->RxHalfCpltCallback = HAL_SPI_RxHalfCpltCallback; /* Legacy weak RxHalfCpltCallback */
  519. break;
  520. case HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID :
  521. hspi->TxRxHalfCpltCallback = HAL_SPI_TxRxHalfCpltCallback; /* Legacy weak TxRxHalfCpltCallback */
  522. break;
  523. case HAL_SPI_ERROR_CB_ID :
  524. hspi->ErrorCallback = HAL_SPI_ErrorCallback; /* Legacy weak ErrorCallback */
  525. break;
  526. case HAL_SPI_ABORT_CB_ID :
  527. hspi->AbortCpltCallback = HAL_SPI_AbortCpltCallback; /* Legacy weak AbortCpltCallback */
  528. break;
  529. case HAL_SPI_MSPINIT_CB_ID :
  530. hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */
  531. break;
  532. case HAL_SPI_MSPDEINIT_CB_ID :
  533. hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */
  534. break;
  535. default :
  536. /* Update the error code */
  537. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  538. /* Return error status */
  539. status = HAL_ERROR;
  540. break;
  541. }
  542. }
  543. else if (HAL_SPI_STATE_RESET == hspi->State)
  544. {
  545. switch (CallbackID)
  546. {
  547. case HAL_SPI_MSPINIT_CB_ID :
  548. hspi->MspInitCallback = HAL_SPI_MspInit; /* Legacy weak MspInit */
  549. break;
  550. case HAL_SPI_MSPDEINIT_CB_ID :
  551. hspi->MspDeInitCallback = HAL_SPI_MspDeInit; /* Legacy weak MspDeInit */
  552. break;
  553. default :
  554. /* Update the error code */
  555. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  556. /* Return error status */
  557. status = HAL_ERROR;
  558. break;
  559. }
  560. }
  561. else
  562. {
  563. /* Update the error code */
  564. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_INVALID_CALLBACK);
  565. /* Return error status */
  566. status = HAL_ERROR;
  567. }
  568. /* Release Lock */
  569. __HAL_UNLOCK(hspi);
  570. return status;
  571. }
  572. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  573. /**
  574. * @}
  575. */
  576. /** @defgroup SPI_Exported_Functions_Group2 IO operation functions
  577. * @brief Data transfers functions
  578. *
  579. @verbatim
  580. ==============================================================================
  581. ##### IO operation functions #####
  582. ===============================================================================
  583. [..]
  584. This subsection provides a set of functions allowing to manage the SPI
  585. data transfers.
  586. [..] The SPI supports master and slave mode :
  587. (#) There are two modes of transfer:
  588. (++) Blocking mode: The communication is performed in polling mode.
  589. The HAL status of all data processing is returned by the same function
  590. after finishing transfer.
  591. (++) No-Blocking mode: The communication is performed using Interrupts
  592. , These APIs return the HAL status.
  593. The end of the data processing will be indicated through the
  594. dedicated SPI IRQ when using Interrupt mode.
  595. The HAL_SPI_TxCpltCallback(), HAL_SPI_RxCpltCallback() and HAL_SPI_TxRxCpltCallback() user callbacks
  596. will be executed respectively at the end of the transmit or Receive process
  597. The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
  598. (#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt)
  599. exist for 1Line (simplex) and 2Lines (full duplex) modes.
  600. @endverbatim
  601. * @{
  602. */
  603. /**
  604. * @brief Transmit an amount of data in blocking mode.
  605. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  606. * the configuration information for SPI module.
  607. * @param pData pointer to data buffer
  608. * @param Size amount of data to be sent
  609. * @param Timeout Timeout duration
  610. * @retval HAL status
  611. */
  612. HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  613. {
  614. uint32_t tickstart;
  615. HAL_StatusTypeDef errorcode = HAL_OK;
  616. uint16_t initial_TxXferCount;
  617. /* Check Direction parameter */
  618. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  619. /* Process Locked */
  620. __HAL_LOCK(hspi);
  621. /* Init tickstart for timeout management*/
  622. tickstart = HAL_GetTick();
  623. initial_TxXferCount = Size;
  624. if (hspi->State != HAL_SPI_STATE_READY)
  625. {
  626. errorcode = HAL_BUSY;
  627. goto error;
  628. }
  629. if ((pData == NULL) || (Size == 0U))
  630. {
  631. errorcode = HAL_ERROR;
  632. goto error;
  633. }
  634. /* Disable SPI peripheral */
  635. __HAL_SPI_DISABLE(hspi);
  636. /* Set the transaction information */
  637. hspi->State = HAL_SPI_STATE_BUSY_TX;
  638. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  639. hspi->pTxBuffPtr = (uint8_t *)pData;
  640. hspi->TxXferSize = Size;
  641. hspi->TxXferCount = Size;
  642. /*Init field not used in handle to zero */
  643. hspi->pRxBuffPtr = (uint8_t *)NULL;
  644. hspi->RxXferSize = 0U;
  645. hspi->RxXferCount = 0U;
  646. hspi->TxISR = NULL;
  647. hspi->RxISR = NULL;
  648. /* Configure communication direction : 1Line */
  649. if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  650. {
  651. /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  652. __HAL_SPI_DISABLE(hspi);
  653. SPI_1LINE_TX(hspi);
  654. }
  655. /* Check if the SPI is already enabled */
  656. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  657. {
  658. /* Enable SPI peripheral */
  659. __HAL_SPI_ENABLE(hspi);
  660. }
  661. /* Transmit data in 16 Bit mode */
  662. if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  663. {
  664. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  665. {
  666. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  667. hspi->pTxBuffPtr += sizeof(uint16_t);
  668. hspi->TxXferCount--;
  669. }
  670. /* Transmit data in 16 Bit mode */
  671. while (hspi->TxXferCount > 0U)
  672. {
  673. /* Wait until TXE flag is set to send data */
  674. if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
  675. {
  676. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  677. hspi->pTxBuffPtr += sizeof(uint16_t);
  678. hspi->TxXferCount--;
  679. }
  680. else
  681. {
  682. /* Timeout management */
  683. if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  684. {
  685. errorcode = HAL_TIMEOUT;
  686. goto error;
  687. }
  688. }
  689. }
  690. }
  691. /* Transmit data in 8 Bit mode */
  692. else
  693. {
  694. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  695. {
  696. *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  697. hspi->pTxBuffPtr += sizeof(uint8_t);
  698. hspi->TxXferCount--;
  699. }
  700. while (hspi->TxXferCount > 0U)
  701. {
  702. /* Wait until TXE flag is set to send data */
  703. if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE))
  704. {
  705. *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  706. hspi->pTxBuffPtr += sizeof(uint8_t);
  707. hspi->TxXferCount--;
  708. }
  709. else
  710. {
  711. /* Timeout management */
  712. if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  713. {
  714. errorcode = HAL_TIMEOUT;
  715. goto error;
  716. }
  717. }
  718. }
  719. }
  720. /* Check the end of the transaction */
  721. if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  722. {
  723. hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  724. }
  725. /* Clear overrun flag in 2 Lines communication mode because received is not read */
  726. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  727. {
  728. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  729. }
  730. if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  731. {
  732. errorcode = HAL_ERROR;
  733. }
  734. error:
  735. hspi->State = HAL_SPI_STATE_READY;
  736. /* Process Unlocked */
  737. __HAL_UNLOCK(hspi);
  738. return errorcode;
  739. }
  740. /**
  741. * @brief Receive an amount of data in blocking mode.
  742. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  743. * the configuration information for SPI module.
  744. * @param pData pointer to data buffer
  745. * @param Size amount of data to be received
  746. * @param Timeout Timeout duration
  747. * @retval HAL status
  748. */
  749. HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  750. {
  751. uint32_t tickstart;
  752. HAL_StatusTypeDef errorcode = HAL_OK;
  753. if ((hspi->Init.Mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES))
  754. {
  755. hspi->State = HAL_SPI_STATE_BUSY_RX;
  756. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  757. return HAL_SPI_TransmitReceive(hspi, pData, pData, Size, Timeout);
  758. }
  759. /* Process Locked */
  760. __HAL_LOCK(hspi);
  761. /* Init tickstart for timeout management*/
  762. tickstart = HAL_GetTick();
  763. if (hspi->State != HAL_SPI_STATE_READY)
  764. {
  765. errorcode = HAL_BUSY;
  766. goto error;
  767. }
  768. if ((pData == NULL) || (Size == 0U))
  769. {
  770. errorcode = HAL_ERROR;
  771. goto error;
  772. }
  773. /* Disable SPI peripheral */
  774. __HAL_SPI_DISABLE(hspi);
  775. /* Set the transaction information */
  776. hspi->State = HAL_SPI_STATE_BUSY_RX;
  777. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  778. hspi->pRxBuffPtr = (uint8_t *)pData;
  779. hspi->RxXferSize = Size;
  780. hspi->RxXferCount = Size;
  781. /*Init field not used in handle to zero */
  782. hspi->pTxBuffPtr = (uint8_t *)NULL;
  783. hspi->TxXferSize = 0U;
  784. hspi->TxXferCount = 0U;
  785. hspi->RxISR = NULL;
  786. hspi->TxISR = NULL;
  787. /* Configure communication direction: 1Line */
  788. if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  789. {
  790. /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  791. __HAL_SPI_DISABLE(hspi);
  792. SPI_1LINE_RX(hspi);
  793. }
  794. /* Check if the SPI is already enabled */
  795. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  796. {
  797. /* Enable SPI peripheral */
  798. __HAL_SPI_ENABLE(hspi);
  799. }
  800. /* Receive data in 8 Bit mode */
  801. if (hspi->Init.DataSize <= SPI_DATASIZE_8BIT)
  802. {
  803. /* Transfer loop */
  804. while (hspi->RxXferCount > 0U)
  805. {
  806. /* Check the RXNE flag */
  807. if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
  808. {
  809. /* read the received data */
  810. (* (uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
  811. hspi->pRxBuffPtr += sizeof(uint8_t);
  812. hspi->RxXferCount--;
  813. }
  814. else
  815. {
  816. /* Timeout management */
  817. if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  818. {
  819. errorcode = HAL_TIMEOUT;
  820. goto error;
  821. }
  822. }
  823. }
  824. }
  825. else
  826. {
  827. /* Transfer loop */
  828. while (hspi->RxXferCount > 0U)
  829. {
  830. /* Check the RXNE flag */
  831. if (__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE))
  832. {
  833. *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
  834. hspi->pRxBuffPtr += sizeof(uint16_t);
  835. hspi->RxXferCount--;
  836. }
  837. else
  838. {
  839. /* Timeout management */
  840. if ((((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY)) || (Timeout == 0U))
  841. {
  842. errorcode = HAL_TIMEOUT;
  843. goto error;
  844. }
  845. }
  846. }
  847. }
  848. /* Check the end of the transaction */
  849. if (SPI_EndRxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  850. {
  851. hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  852. }
  853. if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  854. {
  855. errorcode = HAL_ERROR;
  856. }
  857. error :
  858. hspi->State = HAL_SPI_STATE_READY;
  859. __HAL_UNLOCK(hspi);
  860. return errorcode;
  861. }
  862. /**
  863. * @brief Transmit and Receive an amount of data in blocking mode.
  864. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  865. * the configuration information for SPI module.
  866. * @param pTxData pointer to transmission data buffer
  867. * @param pRxData pointer to reception data buffer
  868. * @param Size amount of data to be sent and received
  869. * @param Timeout Timeout duration
  870. * @retval HAL status
  871. */
  872. HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
  873. uint32_t Timeout)
  874. {
  875. uint16_t initial_TxXferCount;
  876. uint32_t tmp_mode;
  877. HAL_SPI_StateTypeDef tmp_state;
  878. uint32_t tickstart;
  879. /* Variable used to alternate Rx and Tx during transfer */
  880. uint32_t txallowed = 1U;
  881. HAL_StatusTypeDef errorcode = HAL_OK;
  882. /* Check Direction parameter */
  883. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  884. /* Process Locked */
  885. __HAL_LOCK(hspi);
  886. /* Init tickstart for timeout management*/
  887. tickstart = HAL_GetTick();
  888. /* Init temporary variables */
  889. tmp_state = hspi->State;
  890. tmp_mode = hspi->Init.Mode;
  891. initial_TxXferCount = Size;
  892. if (!((tmp_state == HAL_SPI_STATE_READY) || \
  893. ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
  894. {
  895. errorcode = HAL_BUSY;
  896. goto error;
  897. }
  898. if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
  899. {
  900. errorcode = HAL_ERROR;
  901. goto error;
  902. }
  903. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  904. if (hspi->State != HAL_SPI_STATE_BUSY_RX)
  905. {
  906. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  907. }
  908. /* Disable SPI peripheral */
  909. __HAL_SPI_DISABLE(hspi);
  910. /* Set the transaction information */
  911. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  912. hspi->pRxBuffPtr = (uint8_t *)pRxData;
  913. hspi->RxXferCount = Size;
  914. hspi->RxXferSize = Size;
  915. hspi->pTxBuffPtr = (uint8_t *)pTxData;
  916. hspi->TxXferCount = Size;
  917. hspi->TxXferSize = Size;
  918. /*Init field not used in handle to zero */
  919. hspi->RxISR = NULL;
  920. hspi->TxISR = NULL;
  921. /* Check if the SPI is already enabled */
  922. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  923. {
  924. /* Enable SPI peripheral */
  925. __HAL_SPI_ENABLE(hspi);
  926. }
  927. /* Transmit and Receive data in 16 Bit mode */
  928. if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  929. {
  930. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  931. {
  932. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  933. hspi->pTxBuffPtr += sizeof(uint16_t);
  934. hspi->TxXferCount--;
  935. }
  936. while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  937. {
  938. /* Check TXE flag */
  939. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
  940. {
  941. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  942. hspi->pTxBuffPtr += sizeof(uint16_t);
  943. hspi->TxXferCount--;
  944. /* Next Data is a reception (Rx). Tx not allowed */
  945. txallowed = 0U;
  946. }
  947. /* Check RXNE flag */
  948. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
  949. {
  950. *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)hspi->Instance->DR;
  951. hspi->pRxBuffPtr += sizeof(uint16_t);
  952. hspi->RxXferCount--;
  953. /* Next Data is a Transmission (Tx). Tx is allowed */
  954. txallowed = 1U;
  955. }
  956. if (((HAL_GetTick() - tickstart) >= Timeout) && (Timeout != HAL_MAX_DELAY))
  957. {
  958. errorcode = HAL_TIMEOUT;
  959. goto error;
  960. }
  961. }
  962. }
  963. /* Transmit and Receive data in 8 Bit mode */
  964. else
  965. {
  966. if ((hspi->Init.Mode == SPI_MODE_SLAVE) || (initial_TxXferCount == 0x01U))
  967. {
  968. *((__IO uint8_t *)&hspi->Instance->DR) = (*hspi->pTxBuffPtr);
  969. hspi->pTxBuffPtr += sizeof(uint8_t);
  970. hspi->TxXferCount--;
  971. }
  972. while ((hspi->TxXferCount > 0U) || (hspi->RxXferCount > 0U))
  973. {
  974. /* Check TXE flag */
  975. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE)) && (hspi->TxXferCount > 0U) && (txallowed == 1U))
  976. {
  977. *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  978. hspi->pTxBuffPtr++;
  979. hspi->TxXferCount--;
  980. /* Next Data is a reception (Rx). Tx not allowed */
  981. txallowed = 0U;
  982. }
  983. /* Wait until RXNE flag is reset */
  984. if ((__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)) && (hspi->RxXferCount > 0U))
  985. {
  986. (*(uint8_t *)hspi->pRxBuffPtr) = *(__IO uint8_t *)&hspi->Instance->DR;
  987. hspi->pRxBuffPtr++;
  988. hspi->RxXferCount--;
  989. /* Next Data is a Transmission (Tx). Tx is allowed */
  990. txallowed = 1U;
  991. }
  992. if ((((HAL_GetTick() - tickstart) >= Timeout) && ((Timeout != HAL_MAX_DELAY))) || (Timeout == 0U))
  993. {
  994. errorcode = HAL_TIMEOUT;
  995. goto error;
  996. }
  997. }
  998. }
  999. /* Check the end of the transaction */
  1000. if (SPI_EndRxTxTransaction(hspi, Timeout, tickstart) != HAL_OK)
  1001. {
  1002. errorcode = HAL_ERROR;
  1003. hspi->ErrorCode = HAL_SPI_ERROR_FLAG;
  1004. }
  1005. error :
  1006. hspi->State = HAL_SPI_STATE_READY;
  1007. __HAL_UNLOCK(hspi);
  1008. return errorcode;
  1009. }
  1010. /**
  1011. * @brief Transmit an amount of data in non-blocking mode with Interrupt.
  1012. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1013. * the configuration information for SPI module.
  1014. * @param pData pointer to data buffer
  1015. * @param Size amount of data to be sent
  1016. * @retval HAL status
  1017. */
  1018. HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1019. {
  1020. HAL_StatusTypeDef errorcode = HAL_OK;
  1021. /* Check Direction parameter */
  1022. assert_param(IS_SPI_DIRECTION_2LINES_OR_1LINE(hspi->Init.Direction));
  1023. /* Process Locked */
  1024. __HAL_LOCK(hspi);
  1025. if ((pData == NULL) || (Size == 0U))
  1026. {
  1027. errorcode = HAL_ERROR;
  1028. goto error;
  1029. }
  1030. if (hspi->State != HAL_SPI_STATE_READY)
  1031. {
  1032. errorcode = HAL_BUSY;
  1033. goto error;
  1034. }
  1035. /* Disable SPI peripheral */
  1036. __HAL_SPI_DISABLE(hspi);
  1037. /* Set the transaction information */
  1038. hspi->State = HAL_SPI_STATE_BUSY_TX;
  1039. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1040. hspi->pTxBuffPtr = (uint8_t *)pData;
  1041. hspi->TxXferSize = Size;
  1042. hspi->TxXferCount = Size;
  1043. /* Init field not used in handle to zero */
  1044. hspi->pRxBuffPtr = (uint8_t *)NULL;
  1045. hspi->RxXferSize = 0U;
  1046. hspi->RxXferCount = 0U;
  1047. hspi->RxISR = NULL;
  1048. /* Set the function for IT treatment */
  1049. if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  1050. {
  1051. hspi->TxISR = SPI_TxISR_16BIT;
  1052. }
  1053. else
  1054. {
  1055. hspi->TxISR = SPI_TxISR_8BIT;
  1056. }
  1057. /* Configure communication direction : 1Line */
  1058. if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1059. {
  1060. /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1061. __HAL_SPI_DISABLE(hspi);
  1062. SPI_1LINE_TX(hspi);
  1063. }
  1064. /* Enable TXE and ERR interrupt */
  1065. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  1066. /* Check if the SPI is already enabled */
  1067. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1068. {
  1069. /* Enable SPI peripheral */
  1070. __HAL_SPI_ENABLE(hspi);
  1071. }
  1072. error :
  1073. __HAL_UNLOCK(hspi);
  1074. return errorcode;
  1075. }
  1076. /**
  1077. * @brief Receive an amount of data in non-blocking mode with Interrupt.
  1078. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1079. * the configuration information for SPI module.
  1080. * @param pData pointer to data buffer
  1081. * @param Size amount of data to be sent
  1082. * @retval HAL status
  1083. */
  1084. HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
  1085. {
  1086. HAL_StatusTypeDef errorcode = HAL_OK;
  1087. if ((hspi->Init.Direction == SPI_DIRECTION_2LINES) && (hspi->Init.Mode == SPI_MODE_MASTER))
  1088. {
  1089. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1090. /* Call transmit-receive function to send Dummy data on Tx line and generate clock on CLK line */
  1091. return HAL_SPI_TransmitReceive_IT(hspi, pData, pData, Size);
  1092. }
  1093. /* Process Locked */
  1094. __HAL_LOCK(hspi);
  1095. if (hspi->State != HAL_SPI_STATE_READY)
  1096. {
  1097. errorcode = HAL_BUSY;
  1098. goto error;
  1099. }
  1100. if ((pData == NULL) || (Size == 0U))
  1101. {
  1102. errorcode = HAL_ERROR;
  1103. goto error;
  1104. }
  1105. /* Disable SPI peripheral */
  1106. __HAL_SPI_DISABLE(hspi);
  1107. /* Set the transaction information */
  1108. hspi->State = HAL_SPI_STATE_BUSY_RX;
  1109. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1110. hspi->pRxBuffPtr = (uint8_t *)pData;
  1111. hspi->RxXferSize = Size;
  1112. hspi->RxXferCount = Size;
  1113. /* Init field not used in handle to zero */
  1114. hspi->pTxBuffPtr = (uint8_t *)NULL;
  1115. hspi->TxXferSize = 0U;
  1116. hspi->TxXferCount = 0U;
  1117. hspi->TxISR = NULL;
  1118. /* Check the data size to adapt Rx threshold and the set the function for IT treatment */
  1119. if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  1120. {
  1121. hspi->RxISR = SPI_RxISR_16BIT;
  1122. }
  1123. else
  1124. {
  1125. hspi->RxISR = SPI_RxISR_8BIT;
  1126. }
  1127. /* Configure communication direction : 1Line */
  1128. if (hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1129. {
  1130. /* Disable SPI Peripheral before set 1Line direction (BIDIOE bit) */
  1131. __HAL_SPI_DISABLE(hspi);
  1132. SPI_1LINE_RX(hspi);
  1133. }
  1134. /* Enable TXE and ERR interrupt */
  1135. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  1136. /* Note : The SPI must be enabled after unlocking current process
  1137. to avoid the risk of SPI interrupt handle execution before current
  1138. process unlock */
  1139. /* Check if the SPI is already enabled */
  1140. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1141. {
  1142. /* Enable SPI peripheral */
  1143. __HAL_SPI_ENABLE(hspi);
  1144. }
  1145. error :
  1146. /* Process Unlocked */
  1147. __HAL_UNLOCK(hspi);
  1148. return errorcode;
  1149. }
  1150. /**
  1151. * @brief Transmit and Receive an amount of data in non-blocking mode with Interrupt.
  1152. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1153. * the configuration information for SPI module.
  1154. * @param pTxData pointer to transmission data buffer
  1155. * @param pRxData pointer to reception data buffer
  1156. * @param Size amount of data to be sent and received
  1157. * @retval HAL status
  1158. */
  1159. HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
  1160. {
  1161. uint32_t tmp_mode;
  1162. HAL_SPI_StateTypeDef tmp_state;
  1163. HAL_StatusTypeDef errorcode = HAL_OK;
  1164. /* Check Direction parameter */
  1165. assert_param(IS_SPI_DIRECTION_2LINES(hspi->Init.Direction));
  1166. /* Process locked */
  1167. __HAL_LOCK(hspi);
  1168. /* Init temporary variables */
  1169. tmp_state = hspi->State;
  1170. tmp_mode = hspi->Init.Mode;
  1171. if (!((tmp_state == HAL_SPI_STATE_READY) || \
  1172. ((tmp_mode == SPI_MODE_MASTER) && (hspi->Init.Direction == SPI_DIRECTION_2LINES) && (tmp_state == HAL_SPI_STATE_BUSY_RX))))
  1173. {
  1174. errorcode = HAL_BUSY;
  1175. goto error;
  1176. }
  1177. if ((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
  1178. {
  1179. errorcode = HAL_ERROR;
  1180. goto error;
  1181. }
  1182. /* Don't overwrite in case of HAL_SPI_STATE_BUSY_RX */
  1183. if (hspi->State != HAL_SPI_STATE_BUSY_RX)
  1184. {
  1185. hspi->State = HAL_SPI_STATE_BUSY_TX_RX;
  1186. }
  1187. /* Disable SPI peripheral */
  1188. __HAL_SPI_DISABLE(hspi);
  1189. /* Set the transaction information */
  1190. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1191. hspi->pTxBuffPtr = (uint8_t *)pTxData;
  1192. hspi->TxXferSize = Size;
  1193. hspi->TxXferCount = Size;
  1194. hspi->pRxBuffPtr = (uint8_t *)pRxData;
  1195. hspi->RxXferSize = Size;
  1196. hspi->RxXferCount = Size;
  1197. /* Set the function for IT treatment */
  1198. if (hspi->Init.DataSize > SPI_DATASIZE_8BIT)
  1199. {
  1200. hspi->RxISR = SPI_2linesRxISR_16BIT;
  1201. hspi->TxISR = SPI_2linesTxISR_16BIT;
  1202. }
  1203. else
  1204. {
  1205. hspi->RxISR = SPI_2linesRxISR_8BIT;
  1206. hspi->TxISR = SPI_2linesTxISR_8BIT;
  1207. }
  1208. /* Enable TXE, RXNE and ERR interrupt */
  1209. __HAL_SPI_ENABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1210. /* Check if the SPI is already enabled */
  1211. if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
  1212. {
  1213. /* Enable SPI peripheral */
  1214. __HAL_SPI_ENABLE(hspi);
  1215. }
  1216. error :
  1217. /* Process Unlocked */
  1218. __HAL_UNLOCK(hspi);
  1219. return errorcode;
  1220. }
  1221. /**
  1222. * @brief Abort ongoing transfer (blocking mode).
  1223. * @param hspi SPI handle.
  1224. * This procedure performs following operations :
  1225. * - Disable SPI Interrupts (depending of transfer direction)
  1226. * - Set handle State to READY
  1227. * @note This procedure is executed in blocking mode : when exiting function, Abort is considered as completed.
  1228. * @retval HAL status
  1229. */
  1230. HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi)
  1231. {
  1232. HAL_StatusTypeDef errorcode;
  1233. __IO uint32_t count;
  1234. __IO uint32_t resetcount;
  1235. /* Initialized local variable */
  1236. errorcode = HAL_OK;
  1237. resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  1238. count = resetcount;
  1239. /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */
  1240. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
  1241. /* Disable TXEIE, RXNEIE and ERRIE(mode fault event, overrun error) interrupts */
  1242. if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
  1243. {
  1244. hspi->TxISR = SPI_AbortTx_ISR;
  1245. /* Wait HAL_SPI_STATE_ABORT state */
  1246. do
  1247. {
  1248. if (count == 0U)
  1249. {
  1250. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  1251. break;
  1252. }
  1253. count--;
  1254. } while (hspi->State != HAL_SPI_STATE_ABORT);
  1255. /* Reset Timeout Counter */
  1256. count = resetcount;
  1257. }
  1258. if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
  1259. {
  1260. hspi->RxISR = SPI_AbortRx_ISR;
  1261. /* Wait HAL_SPI_STATE_ABORT state */
  1262. do
  1263. {
  1264. if (count == 0U)
  1265. {
  1266. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  1267. break;
  1268. }
  1269. count--;
  1270. } while (hspi->State != HAL_SPI_STATE_ABORT);
  1271. /* Reset Timeout Counter */
  1272. count = resetcount;
  1273. }
  1274. /* Reset Tx and Rx transfer counters */
  1275. hspi->RxXferCount = 0U;
  1276. hspi->TxXferCount = 0U;
  1277. /* Check error during Abort procedure */
  1278. if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
  1279. {
  1280. /* return HAL_Error in case of error during Abort procedure */
  1281. errorcode = HAL_ERROR;
  1282. }
  1283. else
  1284. {
  1285. /* Reset errorCode */
  1286. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1287. }
  1288. /* Clear the Error flags in the SR register */
  1289. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1290. __HAL_SPI_CLEAR_FREFLAG(hspi);
  1291. /* Restore hspi->state to ready */
  1292. hspi->State = HAL_SPI_STATE_READY;
  1293. return errorcode;
  1294. }
  1295. /**
  1296. * @brief Abort ongoing transfer (Interrupt mode).
  1297. * @param hspi SPI handle.
  1298. * @note This procedure could be used for aborting any ongoing transfer (Tx and Rx),
  1299. * started in Interrupt mode.
  1300. * This procedure performs following operations :
  1301. * - Disable SPI Interrupts (depending of transfer direction)
  1302. * - Set handle State to READY
  1303. * - At abort completion, call user abort complete callback
  1304. * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
  1305. * considered as completed only when user abort complete callback is executed (not when exiting function).
  1306. * @retval HAL status
  1307. */
  1308. HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi)
  1309. {
  1310. HAL_StatusTypeDef errorcode;
  1311. uint32_t abortcplt ;
  1312. __IO uint32_t count;
  1313. __IO uint32_t resetcount;
  1314. /* Initialized local variable */
  1315. errorcode = HAL_OK;
  1316. abortcplt = 1U;
  1317. resetcount = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  1318. count = resetcount;
  1319. /* Clear ERRIE interrupt to avoid error interrupts generation during Abort procedure */
  1320. CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_ERRIE);
  1321. /* Change Rx and Tx Irq Handler to Disable TXEIE, RXNEIE and ERRIE interrupts */
  1322. if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE))
  1323. {
  1324. hspi->TxISR = SPI_AbortTx_ISR;
  1325. /* Wait HAL_SPI_STATE_ABORT state */
  1326. do
  1327. {
  1328. if (count == 0U)
  1329. {
  1330. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  1331. break;
  1332. }
  1333. count--;
  1334. } while (hspi->State != HAL_SPI_STATE_ABORT);
  1335. /* Reset Timeout Counter */
  1336. count = resetcount;
  1337. }
  1338. if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
  1339. {
  1340. hspi->RxISR = SPI_AbortRx_ISR;
  1341. /* Wait HAL_SPI_STATE_ABORT state */
  1342. do
  1343. {
  1344. if (count == 0U)
  1345. {
  1346. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  1347. break;
  1348. }
  1349. count--;
  1350. } while (hspi->State != HAL_SPI_STATE_ABORT);
  1351. /* Reset Timeout Counter */
  1352. count = resetcount;
  1353. }
  1354. if (abortcplt == 1U)
  1355. {
  1356. /* Reset Tx and Rx transfer counters */
  1357. hspi->RxXferCount = 0U;
  1358. hspi->TxXferCount = 0U;
  1359. /* Check error during Abort procedure */
  1360. if (hspi->ErrorCode == HAL_SPI_ERROR_ABORT)
  1361. {
  1362. /* return HAL_Error in case of error during Abort procedure */
  1363. errorcode = HAL_ERROR;
  1364. }
  1365. else
  1366. {
  1367. /* Reset errorCode */
  1368. hspi->ErrorCode = HAL_SPI_ERROR_NONE;
  1369. }
  1370. /* Clear the Error flags in the SR register */
  1371. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1372. __HAL_SPI_CLEAR_FREFLAG(hspi);
  1373. /* Restore hspi->State to Ready */
  1374. hspi->State = HAL_SPI_STATE_READY;
  1375. /* call directly user Abort complete callback */
  1376. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  1377. hspi->AbortCpltCallback(hspi);
  1378. #else
  1379. HAL_SPI_AbortCpltCallback(hspi);
  1380. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  1381. }
  1382. return errorcode;
  1383. }
  1384. /**
  1385. * @brief Handle SPI interrupt request.
  1386. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1387. * the configuration information for the specified SPI module.
  1388. * @retval None
  1389. */
  1390. void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
  1391. {
  1392. uint32_t itsource = hspi->Instance->CR2;
  1393. uint32_t itflag = hspi->Instance->SR;
  1394. /* SPI in mode Receiver ----------------------------------------------------*/
  1395. if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) == RESET) &&
  1396. (SPI_CHECK_FLAG(itflag, SPI_FLAG_RXNE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_RXNE) != RESET))
  1397. {
  1398. hspi->RxISR(hspi);
  1399. return;
  1400. }
  1401. /* SPI in mode Transmitter -------------------------------------------------*/
  1402. if ((SPI_CHECK_FLAG(itflag, SPI_FLAG_TXE) != RESET) && (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_TXE) != RESET))
  1403. {
  1404. hspi->TxISR(hspi);
  1405. return;
  1406. }
  1407. /* SPI in Error Treatment --------------------------------------------------*/
  1408. if (((SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET) || (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)) &&
  1409. (SPI_CHECK_IT_SOURCE(itsource, SPI_IT_ERR) != RESET))
  1410. {
  1411. /* SPI Overrun error interrupt occurred ----------------------------------*/
  1412. if (SPI_CHECK_FLAG(itflag, SPI_FLAG_OVR) != RESET)
  1413. {
  1414. if (hspi->State != HAL_SPI_STATE_BUSY_TX)
  1415. {
  1416. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_OVR);
  1417. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1418. }
  1419. else
  1420. {
  1421. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  1422. return;
  1423. }
  1424. }
  1425. /* SPI Mode Fault error interrupt occurred -------------------------------*/
  1426. if (SPI_CHECK_FLAG(itflag, SPI_FLAG_MODF) != RESET)
  1427. {
  1428. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_MODF);
  1429. __HAL_SPI_CLEAR_MODFFLAG(hspi);
  1430. }
  1431. /* SPI Frame error interrupt occurred ------------------------------------*/
  1432. if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  1433. {
  1434. /* Disable all interrupts */
  1435. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE | SPI_IT_TXE | SPI_IT_ERR);
  1436. hspi->State = HAL_SPI_STATE_READY;
  1437. /* Call user error callback */
  1438. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  1439. hspi->ErrorCallback(hspi);
  1440. #else
  1441. HAL_SPI_ErrorCallback(hspi);
  1442. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  1443. }
  1444. return;
  1445. }
  1446. }
  1447. /**
  1448. * @brief Tx Transfer completed callback.
  1449. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1450. * the configuration information for SPI module.
  1451. * @retval None
  1452. */
  1453. __weak void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
  1454. {
  1455. /* Prevent unused argument(s) compilation warning */
  1456. UNUSED(hspi);
  1457. /* NOTE : This function should not be modified, when the callback is needed,
  1458. the HAL_SPI_TxCpltCallback should be implemented in the user file
  1459. */
  1460. }
  1461. /**
  1462. * @brief Rx Transfer completed callback.
  1463. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1464. * the configuration information for SPI module.
  1465. * @retval None
  1466. */
  1467. __weak void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
  1468. {
  1469. /* Prevent unused argument(s) compilation warning */
  1470. UNUSED(hspi);
  1471. /* NOTE : This function should not be modified, when the callback is needed,
  1472. the HAL_SPI_RxCpltCallback should be implemented in the user file
  1473. */
  1474. }
  1475. /**
  1476. * @brief Tx and Rx Transfer completed callback.
  1477. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1478. * the configuration information for SPI module.
  1479. * @retval None
  1480. */
  1481. __weak void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
  1482. {
  1483. /* Prevent unused argument(s) compilation warning */
  1484. UNUSED(hspi);
  1485. /* NOTE : This function should not be modified, when the callback is needed,
  1486. the HAL_SPI_TxRxCpltCallback should be implemented in the user file
  1487. */
  1488. }
  1489. /**
  1490. * @brief Tx Half Transfer completed callback.
  1491. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1492. * the configuration information for SPI module.
  1493. * @retval None
  1494. */
  1495. __weak void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1496. {
  1497. /* Prevent unused argument(s) compilation warning */
  1498. UNUSED(hspi);
  1499. /* NOTE : This function should not be modified, when the callback is needed,
  1500. the HAL_SPI_TxHalfCpltCallback should be implemented in the user file
  1501. */
  1502. }
  1503. /**
  1504. * @brief Rx Half Transfer completed callback.
  1505. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1506. * the configuration information for SPI module.
  1507. * @retval None
  1508. */
  1509. __weak void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1510. {
  1511. /* Prevent unused argument(s) compilation warning */
  1512. UNUSED(hspi);
  1513. /* NOTE : This function should not be modified, when the callback is needed,
  1514. the HAL_SPI_RxHalfCpltCallback() should be implemented in the user file
  1515. */
  1516. }
  1517. /**
  1518. * @brief Tx and Rx Half Transfer callback.
  1519. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1520. * the configuration information for SPI module.
  1521. * @retval None
  1522. */
  1523. __weak void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi)
  1524. {
  1525. /* Prevent unused argument(s) compilation warning */
  1526. UNUSED(hspi);
  1527. /* NOTE : This function should not be modified, when the callback is needed,
  1528. the HAL_SPI_TxRxHalfCpltCallback() should be implemented in the user file
  1529. */
  1530. }
  1531. /**
  1532. * @brief SPI error callback.
  1533. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1534. * the configuration information for SPI module.
  1535. * @retval None
  1536. */
  1537. __weak void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
  1538. {
  1539. /* Prevent unused argument(s) compilation warning */
  1540. UNUSED(hspi);
  1541. /* NOTE : This function should not be modified, when the callback is needed,
  1542. the HAL_SPI_ErrorCallback should be implemented in the user file
  1543. */
  1544. /* NOTE : The ErrorCode parameter in the hspi handle is updated by the SPI processes
  1545. and user can use HAL_SPI_GetError() API to check the latest error occurred
  1546. */
  1547. }
  1548. /**
  1549. * @brief SPI Abort Complete callback.
  1550. * @param hspi SPI handle.
  1551. * @retval None
  1552. */
  1553. __weak void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi)
  1554. {
  1555. /* Prevent unused argument(s) compilation warning */
  1556. UNUSED(hspi);
  1557. /* NOTE : This function should not be modified, when the callback is needed,
  1558. the HAL_SPI_AbortCpltCallback can be implemented in the user file.
  1559. */
  1560. }
  1561. /**
  1562. * @}
  1563. */
  1564. /** @defgroup SPI_Exported_Functions_Group3 Peripheral State and Errors functions
  1565. * @brief SPI control functions
  1566. *
  1567. @verbatim
  1568. ===============================================================================
  1569. ##### Peripheral State and Errors functions #####
  1570. ===============================================================================
  1571. [..]
  1572. This subsection provides a set of functions allowing to control the SPI.
  1573. (+) HAL_SPI_GetState() API can be helpful to check in run-time the state of the SPI peripheral
  1574. (+) HAL_SPI_GetError() check in run-time Errors occurring during communication
  1575. @endverbatim
  1576. * @{
  1577. */
  1578. /**
  1579. * @brief Return the SPI handle state.
  1580. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1581. * the configuration information for SPI module.
  1582. * @retval SPI state
  1583. */
  1584. HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi)
  1585. {
  1586. /* Return SPI handle state */
  1587. return hspi->State;
  1588. }
  1589. /**
  1590. * @brief Return the SPI error code.
  1591. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1592. * the configuration information for SPI module.
  1593. * @retval SPI error code in bitmap format
  1594. */
  1595. uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
  1596. {
  1597. /* Return SPI ErrorCode */
  1598. return hspi->ErrorCode;
  1599. }
  1600. /**
  1601. * @}
  1602. */
  1603. /**
  1604. * @}
  1605. */
  1606. /** @addtogroup SPI_Private_Functions
  1607. * @brief Private functions
  1608. * @{
  1609. */
  1610. /**
  1611. * @brief Rx 8-bit handler for Transmit and Receive in Interrupt mode.
  1612. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1613. * the configuration information for SPI module.
  1614. * @retval None
  1615. */
  1616. static void SPI_2linesRxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  1617. {
  1618. /* Receive data in 8 Bit mode */
  1619. *hspi->pRxBuffPtr = *((__IO uint8_t *)&hspi->Instance->DR);
  1620. hspi->pRxBuffPtr++;
  1621. hspi->RxXferCount--;
  1622. /* Check end of the reception */
  1623. if (hspi->RxXferCount == 0U)
  1624. {
  1625. /* Disable RXNE and ERR interrupt */
  1626. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  1627. if (hspi->TxXferCount == 0U)
  1628. {
  1629. SPI_CloseRxTx_ISR(hspi);
  1630. }
  1631. }
  1632. }
  1633. /**
  1634. * @brief Tx 8-bit handler for Transmit and Receive in Interrupt mode.
  1635. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1636. * the configuration information for SPI module.
  1637. * @retval None
  1638. */
  1639. static void SPI_2linesTxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  1640. {
  1641. /* Transmit data in 8 Bit mode */
  1642. *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  1643. hspi->pTxBuffPtr++;
  1644. hspi->TxXferCount--;
  1645. /* Check the end of the transmission */
  1646. if (hspi->TxXferCount == 0U)
  1647. {
  1648. /* Disable TXE interrupt */
  1649. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
  1650. if (hspi->RxXferCount == 0U)
  1651. {
  1652. SPI_CloseRxTx_ISR(hspi);
  1653. }
  1654. }
  1655. }
  1656. /**
  1657. * @brief Rx 16-bit handler for Transmit and Receive in Interrupt mode.
  1658. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1659. * the configuration information for SPI module.
  1660. * @retval None
  1661. */
  1662. static void SPI_2linesRxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  1663. {
  1664. /* Receive data in 16 Bit mode */
  1665. *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);
  1666. hspi->pRxBuffPtr += sizeof(uint16_t);
  1667. hspi->RxXferCount--;
  1668. if (hspi->RxXferCount == 0U)
  1669. {
  1670. /* Disable RXNE interrupt */
  1671. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_RXNE);
  1672. if (hspi->TxXferCount == 0U)
  1673. {
  1674. SPI_CloseRxTx_ISR(hspi);
  1675. }
  1676. }
  1677. }
  1678. /**
  1679. * @brief Tx 16-bit handler for Transmit and Receive in Interrupt mode.
  1680. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1681. * the configuration information for SPI module.
  1682. * @retval None
  1683. */
  1684. static void SPI_2linesTxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  1685. {
  1686. /* Transmit data in 16 Bit mode */
  1687. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  1688. hspi->pTxBuffPtr += sizeof(uint16_t);
  1689. hspi->TxXferCount--;
  1690. if (hspi->TxXferCount == 0U)
  1691. {
  1692. /* Disable TXE interrupt */
  1693. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_TXE);
  1694. if (hspi->RxXferCount == 0U)
  1695. {
  1696. SPI_CloseRxTx_ISR(hspi);
  1697. }
  1698. }
  1699. }
  1700. /**
  1701. * @brief Manage the receive 8-bit in Interrupt context.
  1702. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1703. * the configuration information for SPI module.
  1704. * @retval None
  1705. */
  1706. static void SPI_RxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  1707. {
  1708. *hspi->pRxBuffPtr = (*(__IO uint8_t *)&hspi->Instance->DR);
  1709. hspi->pRxBuffPtr++;
  1710. hspi->RxXferCount--;
  1711. if (hspi->RxXferCount == 0U)
  1712. {
  1713. SPI_CloseRx_ISR(hspi);
  1714. }
  1715. }
  1716. /**
  1717. * @brief Manage the 16-bit receive in Interrupt context.
  1718. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1719. * the configuration information for SPI module.
  1720. * @retval None
  1721. */
  1722. static void SPI_RxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  1723. {
  1724. *((uint16_t *)hspi->pRxBuffPtr) = (uint16_t)(hspi->Instance->DR);
  1725. hspi->pRxBuffPtr += sizeof(uint16_t);
  1726. hspi->RxXferCount--;
  1727. if (hspi->RxXferCount == 0U)
  1728. {
  1729. SPI_CloseRx_ISR(hspi);
  1730. }
  1731. }
  1732. /**
  1733. * @brief Handle the data 8-bit transmit in Interrupt mode.
  1734. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1735. * the configuration information for SPI module.
  1736. * @retval None
  1737. */
  1738. static void SPI_TxISR_8BIT(struct __SPI_HandleTypeDef *hspi)
  1739. {
  1740. *(__IO uint8_t *)&hspi->Instance->DR = (*hspi->pTxBuffPtr);
  1741. hspi->pTxBuffPtr++;
  1742. hspi->TxXferCount--;
  1743. if (hspi->TxXferCount == 0U)
  1744. {
  1745. SPI_CloseTx_ISR(hspi);
  1746. }
  1747. }
  1748. /**
  1749. * @brief Handle the data 16-bit transmit in Interrupt mode.
  1750. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1751. * the configuration information for SPI module.
  1752. * @retval None
  1753. */
  1754. static void SPI_TxISR_16BIT(struct __SPI_HandleTypeDef *hspi)
  1755. {
  1756. /* Transmit data in 16 Bit mode */
  1757. hspi->Instance->DR = *((uint16_t *)hspi->pTxBuffPtr);
  1758. hspi->pTxBuffPtr += sizeof(uint16_t);
  1759. hspi->TxXferCount--;
  1760. if (hspi->TxXferCount == 0U)
  1761. {
  1762. SPI_CloseTx_ISR(hspi);
  1763. }
  1764. }
  1765. /**
  1766. * @brief Handle SPI Communication Timeout.
  1767. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1768. * the configuration information for SPI module.
  1769. * @param Flag SPI flag to check
  1770. * @param State flag state to check
  1771. * @param Timeout Timeout duration
  1772. * @param Tickstart tick start value
  1773. * @retval HAL status
  1774. */
  1775. static HAL_StatusTypeDef SPI_WaitFlagStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus State,
  1776. uint32_t Timeout, uint32_t Tickstart)
  1777. {
  1778. __IO uint32_t count;
  1779. uint32_t tmp_timeout;
  1780. uint32_t tmp_tickstart;
  1781. /* Adjust Timeout value in case of end of transfer */
  1782. tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
  1783. tmp_tickstart = HAL_GetTick();
  1784. /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
  1785. count = tmp_timeout * ((SystemCoreClock * 32U) >> 20U);
  1786. while ((__HAL_SPI_GET_FLAG(hspi, Flag) ? SET : RESET) != State)
  1787. {
  1788. if (Timeout != HAL_MAX_DELAY)
  1789. {
  1790. if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
  1791. {
  1792. /* Disable the SPI */
  1793. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1794. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1795. if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1796. || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1797. {
  1798. /* Disable SPI peripheral */
  1799. __HAL_SPI_DISABLE(hspi);
  1800. }
  1801. hspi->State = HAL_SPI_STATE_READY;
  1802. /* Process Unlocked */
  1803. __HAL_UNLOCK(hspi);
  1804. return HAL_TIMEOUT;
  1805. }
  1806. /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
  1807. if(count == 0U)
  1808. {
  1809. tmp_timeout = 0U;
  1810. }
  1811. count--;
  1812. }
  1813. }
  1814. return HAL_OK;
  1815. }
  1816. /**
  1817. * @brief Handle SPI FIFO Communication Timeout.
  1818. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1819. * the configuration information for SPI module.
  1820. * @param Fifo Fifo to check
  1821. * @param State Fifo state to check
  1822. * @param Timeout Timeout duration
  1823. * @param Tickstart tick start value
  1824. * @retval HAL status
  1825. */
  1826. static HAL_StatusTypeDef SPI_WaitFifoStateUntilTimeout(SPI_HandleTypeDef *hspi, uint32_t Fifo, uint32_t State,
  1827. uint32_t Timeout, uint32_t Tickstart)
  1828. {
  1829. __IO uint32_t count;
  1830. uint32_t tmp_timeout;
  1831. uint32_t tmp_tickstart;
  1832. __IO uint8_t * ptmpreg8;
  1833. __IO uint8_t tmpreg8 = 0;
  1834. /* Adjust Timeout value in case of end of transfer */
  1835. tmp_timeout = Timeout - (HAL_GetTick() - Tickstart);
  1836. tmp_tickstart = HAL_GetTick();
  1837. /* Initialize the 8bit temporary pointer */
  1838. ptmpreg8 = (__IO uint8_t *)&hspi->Instance->DR;
  1839. /* Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled */
  1840. count = tmp_timeout * ((SystemCoreClock * 35U) >> 20U);
  1841. while ((hspi->Instance->SR & Fifo) != State)
  1842. {
  1843. if ((Fifo == SPI_SR_FRLVL) && (State == SPI_FRLVL_EMPTY))
  1844. {
  1845. /* Flush Data Register by a blank read */
  1846. tmpreg8 = *ptmpreg8;
  1847. /* To avoid GCC warning */
  1848. UNUSED(tmpreg8);
  1849. }
  1850. if (Timeout != HAL_MAX_DELAY)
  1851. {
  1852. if (((HAL_GetTick() - tmp_tickstart) >= tmp_timeout) || (tmp_timeout == 0U))
  1853. {
  1854. /* Disable the SPI */
  1855. /* Disable TXE, RXNE and ERR interrupts for the interrupt process */
  1856. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_RXNE | SPI_IT_ERR));
  1857. if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1858. || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1859. {
  1860. /* Disable SPI peripheral */
  1861. __HAL_SPI_DISABLE(hspi);
  1862. }
  1863. hspi->State = HAL_SPI_STATE_READY;
  1864. /* Process Unlocked */
  1865. __HAL_UNLOCK(hspi);
  1866. return HAL_TIMEOUT;
  1867. }
  1868. /* If Systick is disabled or not incremented, deactivate timeout to go in disable loop procedure */
  1869. if(count == 0U)
  1870. {
  1871. tmp_timeout = 0U;
  1872. }
  1873. count--;
  1874. }
  1875. }
  1876. return HAL_OK;
  1877. }
  1878. /**
  1879. * @brief Handle the check of the RX transaction complete.
  1880. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1881. * the configuration information for SPI module.
  1882. * @param Timeout Timeout duration
  1883. * @param Tickstart tick start value
  1884. * @retval HAL status
  1885. */
  1886. static HAL_StatusTypeDef SPI_EndRxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
  1887. {
  1888. if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1889. || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1890. {
  1891. /* Disable SPI peripheral */
  1892. __HAL_SPI_DISABLE(hspi);
  1893. }
  1894. /* Control the BSY flag */
  1895. if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
  1896. {
  1897. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1898. return HAL_TIMEOUT;
  1899. }
  1900. if ((hspi->Init.Mode == SPI_MODE_MASTER) && ((hspi->Init.Direction == SPI_DIRECTION_1LINE)
  1901. || (hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
  1902. {
  1903. /* Empty the FRLVL fifo */
  1904. if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
  1905. {
  1906. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1907. return HAL_TIMEOUT;
  1908. }
  1909. }
  1910. return HAL_OK;
  1911. }
  1912. /**
  1913. * @brief Handle the check of the RXTX or TX transaction complete.
  1914. * @param hspi SPI handle
  1915. * @param Timeout Timeout duration
  1916. * @param Tickstart tick start value
  1917. * @retval HAL status
  1918. */
  1919. static HAL_StatusTypeDef SPI_EndRxTxTransaction(SPI_HandleTypeDef *hspi, uint32_t Timeout, uint32_t Tickstart)
  1920. {
  1921. /* Control if the TX fifo is empty */
  1922. if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FTLVL, SPI_FTLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
  1923. {
  1924. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1925. return HAL_TIMEOUT;
  1926. }
  1927. /* Control the BSY flag */
  1928. if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, Timeout, Tickstart) != HAL_OK)
  1929. {
  1930. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1931. return HAL_TIMEOUT;
  1932. }
  1933. /* Control if the RX fifo is empty */
  1934. if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, Timeout, Tickstart) != HAL_OK)
  1935. {
  1936. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1937. return HAL_TIMEOUT;
  1938. }
  1939. return HAL_OK;
  1940. }
  1941. /**
  1942. * @brief Handle the end of the RXTX transaction.
  1943. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1944. * the configuration information for SPI module.
  1945. * @retval None
  1946. */
  1947. static void SPI_CloseRxTx_ISR(SPI_HandleTypeDef *hspi)
  1948. {
  1949. uint32_t tickstart;
  1950. /* Init tickstart for timeout management */
  1951. tickstart = HAL_GetTick();
  1952. /* Disable ERR interrupt */
  1953. __HAL_SPI_DISABLE_IT(hspi, SPI_IT_ERR);
  1954. /* Check the end of the transaction */
  1955. if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  1956. {
  1957. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  1958. }
  1959. if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  1960. {
  1961. if (hspi->State == HAL_SPI_STATE_BUSY_RX)
  1962. {
  1963. hspi->State = HAL_SPI_STATE_READY;
  1964. /* Call user Rx complete callback */
  1965. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  1966. hspi->RxCpltCallback(hspi);
  1967. #else
  1968. HAL_SPI_RxCpltCallback(hspi);
  1969. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  1970. }
  1971. else
  1972. {
  1973. hspi->State = HAL_SPI_STATE_READY;
  1974. /* Call user TxRx complete callback */
  1975. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  1976. hspi->TxRxCpltCallback(hspi);
  1977. #else
  1978. HAL_SPI_TxRxCpltCallback(hspi);
  1979. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  1980. }
  1981. }
  1982. else
  1983. {
  1984. hspi->State = HAL_SPI_STATE_READY;
  1985. /* Call user error callback */
  1986. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  1987. hspi->ErrorCallback(hspi);
  1988. #else
  1989. HAL_SPI_ErrorCallback(hspi);
  1990. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  1991. }
  1992. }
  1993. /**
  1994. * @brief Handle the end of the RX transaction.
  1995. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  1996. * the configuration information for SPI module.
  1997. * @retval None
  1998. */
  1999. static void SPI_CloseRx_ISR(SPI_HandleTypeDef *hspi)
  2000. {
  2001. /* Disable RXNE and ERR interrupt */
  2002. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_RXNE | SPI_IT_ERR));
  2003. /* Check the end of the transaction */
  2004. if (SPI_EndRxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2005. {
  2006. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2007. }
  2008. hspi->State = HAL_SPI_STATE_READY;
  2009. if (hspi->ErrorCode == HAL_SPI_ERROR_NONE)
  2010. {
  2011. /* Call user Rx complete callback */
  2012. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2013. hspi->RxCpltCallback(hspi);
  2014. #else
  2015. HAL_SPI_RxCpltCallback(hspi);
  2016. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2017. }
  2018. else
  2019. {
  2020. /* Call user error callback */
  2021. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2022. hspi->ErrorCallback(hspi);
  2023. #else
  2024. HAL_SPI_ErrorCallback(hspi);
  2025. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2026. }
  2027. }
  2028. /**
  2029. * @brief Handle the end of the TX transaction.
  2030. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  2031. * the configuration information for SPI module.
  2032. * @retval None
  2033. */
  2034. static void SPI_CloseTx_ISR(SPI_HandleTypeDef *hspi)
  2035. {
  2036. uint32_t tickstart;
  2037. /* Init tickstart for timeout management*/
  2038. tickstart = HAL_GetTick();
  2039. /* Disable TXE and ERR interrupt */
  2040. __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE | SPI_IT_ERR));
  2041. /* Check the end of the transaction */
  2042. if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, tickstart) != HAL_OK)
  2043. {
  2044. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_FLAG);
  2045. }
  2046. /* Clear overrun flag in 2 Lines communication mode because received is not read */
  2047. if (hspi->Init.Direction == SPI_DIRECTION_2LINES)
  2048. {
  2049. __HAL_SPI_CLEAR_OVRFLAG(hspi);
  2050. }
  2051. hspi->State = HAL_SPI_STATE_READY;
  2052. if (hspi->ErrorCode != HAL_SPI_ERROR_NONE)
  2053. {
  2054. /* Call user error callback */
  2055. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2056. hspi->ErrorCallback(hspi);
  2057. #else
  2058. HAL_SPI_ErrorCallback(hspi);
  2059. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2060. }
  2061. else
  2062. {
  2063. /* Call user Rx complete callback */
  2064. #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
  2065. hspi->TxCpltCallback(hspi);
  2066. #else
  2067. HAL_SPI_TxCpltCallback(hspi);
  2068. #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
  2069. }
  2070. }
  2071. /**
  2072. * @brief Handle abort a Rx transaction.
  2073. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  2074. * the configuration information for SPI module.
  2075. * @retval None
  2076. */
  2077. static void SPI_AbortRx_ISR(SPI_HandleTypeDef *hspi)
  2078. {
  2079. __IO uint32_t count;
  2080. /* Disable SPI Peripheral */
  2081. __HAL_SPI_DISABLE(hspi);
  2082. count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  2083. /* Disable RXNEIE interrupt */
  2084. CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXNEIE));
  2085. /* Check RXNEIE is disabled */
  2086. do
  2087. {
  2088. if (count == 0U)
  2089. {
  2090. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2091. break;
  2092. }
  2093. count--;
  2094. } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE));
  2095. /* Control the BSY flag */
  2096. if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2097. {
  2098. hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2099. }
  2100. /* Empty the FRLVL fifo */
  2101. if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2102. {
  2103. hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2104. }
  2105. hspi->State = HAL_SPI_STATE_ABORT;
  2106. }
  2107. /**
  2108. * @brief Handle abort a Tx or Rx/Tx transaction.
  2109. * @param hspi pointer to a SPI_HandleTypeDef structure that contains
  2110. * the configuration information for SPI module.
  2111. * @retval None
  2112. */
  2113. static void SPI_AbortTx_ISR(SPI_HandleTypeDef *hspi)
  2114. {
  2115. __IO uint32_t count;
  2116. count = SPI_DEFAULT_TIMEOUT * (SystemCoreClock / 24U / 1000U);
  2117. /* Disable TXEIE interrupt */
  2118. CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_TXEIE));
  2119. /* Check TXEIE is disabled */
  2120. do
  2121. {
  2122. if (count == 0U)
  2123. {
  2124. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2125. break;
  2126. }
  2127. count--;
  2128. } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_TXEIE));
  2129. if (SPI_EndRxTxTransaction(hspi, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2130. {
  2131. hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2132. }
  2133. /* Disable SPI Peripheral */
  2134. __HAL_SPI_DISABLE(hspi);
  2135. /* Empty the FRLVL fifo */
  2136. if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2137. {
  2138. hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2139. }
  2140. /* Check case of Full-Duplex Mode and disable directly RXNEIE interrupt */
  2141. if (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE))
  2142. {
  2143. /* Disable RXNEIE interrupt */
  2144. CLEAR_BIT(hspi->Instance->CR2, (SPI_CR2_RXNEIE));
  2145. /* Check RXNEIE is disabled */
  2146. do
  2147. {
  2148. if (count == 0U)
  2149. {
  2150. SET_BIT(hspi->ErrorCode, HAL_SPI_ERROR_ABORT);
  2151. break;
  2152. }
  2153. count--;
  2154. } while (HAL_IS_BIT_SET(hspi->Instance->CR2, SPI_CR2_RXNEIE));
  2155. /* Control the BSY flag */
  2156. if (SPI_WaitFlagStateUntilTimeout(hspi, SPI_FLAG_BSY, RESET, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2157. {
  2158. hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2159. }
  2160. /* Empty the FRLVL fifo */
  2161. if (SPI_WaitFifoStateUntilTimeout(hspi, SPI_FLAG_FRLVL, SPI_FRLVL_EMPTY, SPI_DEFAULT_TIMEOUT, HAL_GetTick()) != HAL_OK)
  2162. {
  2163. hspi->ErrorCode = HAL_SPI_ERROR_ABORT;
  2164. }
  2165. }
  2166. hspi->State = HAL_SPI_STATE_ABORT;
  2167. }
  2168. /**
  2169. * @}
  2170. */
  2171. #endif /* HAL_SPI_MODULE_ENABLED */
  2172. /**
  2173. * @}
  2174. */
  2175. /**
  2176. * @}
  2177. */
  2178. /************************ (C) COPYRIGHT Puya *****END OF FILE****/